Reduced-complexity Viterbi detector architectures for partial response signalling

Conference Record / IEEE Global Telecommunications Conference

Volumn 1, Issue , 1995, Pages 559-565

  Fettweis, Gerhard ^a   Karabed, Razmik ^a   Siegel, Paul H ^a   Thapar, Hemant K ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; COMPUTER HARDWARE; DECODING; DETECTORS; MAGNETIC STORAGE; OPTIMIZATION; TRELLIS CODES;

SIGNAL FLOW GRAPH; VITERBI ALGORITHMS; VITERBI DETECTORS;

SIGNAL DETECTION;

EID: 0029547634     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)