Plastic Packaging and Burn-in Effects on Ionizing Dose Response in CMOS Microcircuits1

IEEE Transactions on Nuclear Science

Volumn 42, Issue 6, 1995, Pages 1607-1614

  Clark, Steven D ^a   Bings, John P ^b   Maher, Michael C ^c   Williams, Michael K ^b   Alexander, David R ^d   Pease, Ronald L ^e  

^a NAVAL SURFACE WARFARE CENTER   (United States)

^b National Semiconductor Corporation ^*

^c NATIONAL SEMICONDUCTOR CORPORATION   (United States)

^d MISSION RESEARCH CORPORATION   (United States)

^e RLP Research Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CERAMIC COATINGS; ELECTRONICS PACKAGING; ENCAPSULATION; INTEGRATED CIRCUIT TESTING; PLASTIC COATINGS; RADIATION EFFECTS; RADIATION HARDENING;

BURN IN EFFECTS; IONIZING DOSE; RADIATION INDUCED LEAKAGE PATHS;

CMOS INTEGRATED CIRCUITS;

EID: 0029547147     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/23.488756     Document Type: Article

References (6)

1. M.R. Shaneyfelt, et al., “Effects of Burn-in on Radiation Hardness,” IEEE Transactions on Nuclear Science, vol. 41, pp. 2550–2559, December 1994.
2. R.D. Mosbarger, “Electro-Thermally Induced Parasitic Gate Leakage,” International Symposium for Failure Analysis Proceedings, Los Angeles, Ca. November 1993, pp. 205–211.
3. R.D. Mosbarger and DJ. Hickey, “The Effects of Materials and Post-Mold Profiles on Plastic Encapsulated Integrated Circuits,” IEEE International Reliability Physics Symposium, 1994, pp. 93–100.
4. Micron Semiconductors, Inc., SRAM Data Book, 1993, pp. 10–12 - 10–14.
5. D.M. Fleetwood, P.S. Winokur, and T.L. Meisenheimer, “Hardness Assurance for Low-Dose Space Applications,” IEEE Trans. On Nucl. Sci., NS-38, no. 6, pp. 1552–1559, December 1991.
6. F.W. Sexton, “Qualifying Commercial ICs for Space Total Dose Environments,” IEEE Transactions on Nuclear Science, vol. NS-39, pp. 1869, December 1992.