Timing-driven test point insertion for full-scan and partial-scan BIST

IEEE International Test Conference (TC)

Volumn , Issue , 1995, Pages 506-514

  Cheng, Kwang Ting ^a   Lin, Chih Jen ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTATIONAL METHODS; CRITICAL PATH ANALYSIS; FLIP FLOP CIRCUITS; ITERATIVE METHODS; PERFORMANCE; RANDOM PROCESSES; SCANNING; TIMING CIRCUITS;

BUILT-IN SELF TEST SCHEME; FULL SCAN; GRADIENT BASED METHODS; PARTIAL SCAN; RANDOM PATTERN TESTABILITY; SYMBOLIC COMPUTATION TECHNIQUE; TEST POINT INSERTION METHODS;

INTEGRATED CIRCUIT TESTING;

EID: 0029546834     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)