Si-MOSFET scaling down to deep-sub-0.1-micron range and future of silicon LSI

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 1995, Pages 262-267

  Iwai, Hiroshi ^a   Sasaki Momose, Hisayo ^a   Katsumata, Yasuhiro ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

GATES (TRANSISTOR); LEAKAGE CURRENTS; LSI CIRCUITS; MICROPROCESSOR CHIPS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SWITCHING; SWITCHING FUNCTIONS;

DOWN SIZING; GATE LENGTH REDUCTIONS; MICRON RANGE; SCALING DOWN;

MOSFET DEVICES;

EID: 0029544419     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)