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Volumn , Issue , 1995, Pages 86-90
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Layout synthesis for datapath designs
a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
CRITICAL PATH ANALYSIS;
DESIGN AIDS;
HEURISTIC METHODS;
INTEGRATED CIRCUIT LAYOUT;
INTERFACES (COMPUTER);
PROBLEM SOLVING;
RESPONSE TIME (COMPUTER SYSTEMS);
BIT-SLICED DATAPATH;
CONTROL SIGNAL;
DATAPATH DESIGNS;
HIGH-LEVEL SYNTHESIS SYSTEM;
LAYOUT SYNTHESIS;
PLACEMENT;
ROUTING;
RUN-TIME EFFICIENCY;
STANDARD-CELL LIBRARIES;
WINDOW-BASED HEURISTIC;
LOGIC DESIGN;
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EID: 0029544068
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (12)
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