Fully planarized 0.25μm CMOS technology for 256Mbit DRAM and beyond

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1995, Pages 15-16

  Bronner, G ^a   Aochi, H ^a   Gall, M ^a   Gambino, J ^a   Gernhardt, S ^a   Hammer, E ^a   Ho, H ^a   Iba, I ^a   Ishiuchi, H ^a   Jaso, M ^a   Kleinhenz, R ^a   Mii, T ^a   Narita, M ^a   Nesbit, L ^a   Neumueller, W ^a   et al , ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; CAPACITORS; CHEMICAL POLISHING; DIFFUSION; ELECTRODES; GATES (TRANSISTOR); LITHOGRAPHY; MASKS; RANDOM ACCESS STORAGE; REACTIVE ION ETCHING; TUNGSTEN COMPOUNDS;

CHEMICAL MECHANICAL POLISHING; DAMASCENE TUNGSTEN; GATE ELECTRODES; INCREMENTAL TECHNOLOGY SCALING; SURFACE CONCENTRATION; TRENCH STORAGE CAPACITOR;

CMOS INTEGRATED CIRCUITS;

EID: 0029543173     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)