High performance sub-tenth micron CMOS using advanced boron doping and WSi2 dual gate process

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1995, Pages 9-10

  Takeuchi, Kiyoshi ^a   Yamamoto, Toyoji ^a   Furukawa, Akio ^a   Tamura, Takao ^a   Yoshida, Kazuyoshi ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; DIFFUSION IN SOLIDS; MASKS; MOS DEVICES; OSCILLATORS (ELECTRONIC); SCANNING ELECTRON MICROSCOPY; SECONDARY ION MASS SPECTROMETRY; SEMICONDUCTING BORON; SEMICONDUCTOR DOPING; TUNGSTEN COMPOUNDS;

BORON DOPING METHODS; HOT CARRIER MEASUREMENTS; SHORT CHANNEL EFFECT; SOLID PHASE DIFFUSION; SOURCE/DRAIN ACTIVATION METHOD; THIN SIDEWALL FORMATION;

CMOS INTEGRATED CIRCUITS;

EID: 0029543172     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)