Enable++: a second generation FPGA processor

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1995, Pages 45-53

  Hogl, H ^a   Kugel, a ^a   Ludvig, J ^a   Manner, R ^a   Noffz, K H ^a   Zoz, R ^a  

^a UNIVERSITY OF MANNHEIM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAY; PROGRAMMABLE CROSSBAR SWITCHES;

ALGORITHMS; COMPUTER DEBUGGING; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER PROGRAMMING; COMPUTER SIMULATION; INPUT OUTPUT PROGRAMS; PATTERN RECOGNITION; RANDOM ACCESS STORAGE; REAL TIME SYSTEMS; REDUCED INSTRUCTION SET COMPUTING;

PROGRAM PROCESSORS;

EID: 0029540843     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)