Pass-transistor dual value logic for low-power CMOS

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 1995, Pages 341-344

  Oklobdzija, Vojin G ^a   Duchene, B ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS; LOGIC GATES; MANY VALUED LOGICS; MOS DEVICES; TRANSISTORS;

LOW-POWER CMOS; PASS-TRANSISTOR DUAL VALUE LOGIC;

CMOS INTEGRATED CIRCUITS;

EID: 0029532180     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)