An Integrated System for Assigning Signal Flow Directions to CMOS Transistors

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 14, Issue 12, 1995, Pages 1445-1458

  Breuer, Melvin A ^d  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

^b PHILIPS RESEARCH LABORATORIES   (Germany)

^c GENERAL ELECTRIC COMPANY   (United States)

^d UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL LINGUISTICS; COMPUTER AIDED DESIGN; GRAPH THEORY; KNOWLEDGE BASED SYSTEMS; LOGIC CIRCUITS; LOGIC GATES; SEMICONDUCTOR DEVICE MODELS;

CIRCUIT SEMANTICS; ELECTRICAL RULES CHECKING; GLOBAL SOURCE TARGET GRAPH; INTEGRATED SYSTEM; LINEAR TIME ALGORITHM; SIGNAL FLOW DIRECTIONS; SIX TRANSISTOR MEMORY CELL;

MOSFET DEVICES;

EID: 0029517634     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.476575     Document Type: Article

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