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Volumn , Issue , 1995, Pages 237-242
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Effective programmable prefetch engine for on-chip caches
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Author keywords
[No Author keywords available]
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Indexed keywords
BUFFER STORAGE;
COMPUTER HARDWARE;
COMPUTER SIMULATION;
COST EFFECTIVENESS;
MICROPROCESSOR CHIPS;
PERFORMANCE;
PIPELINE PROCESSING SYSTEMS;
PROGRAM COMPILERS;
RESPONSE TIME (COMPUTER SYSTEMS);
CHIP AREA;
CYCLE TIME;
DATA ACCESS PENALTY;
MEMORY LATENCY;
ON CHIP CACHES;
PROGRAMMABLE PREFETCH ENGINE;
TRACE DRIVEN SIMULATION;
COMPUTER ARCHITECTURE;
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EID: 0029511258
PISSN: 10724451
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
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Times cited : (25)
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References (16)
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