High voltage BiCDMOS technology on bonded 2μm SOI integrating vertical npn pnp, 60V-LDMOS and MPU, capable of 200°C operation

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1995, Pages 967-970

  Funaki, Hideyuki ^a   Yamaguchi, Yoshihiro ^a   Kawaguchi, Yusuke ^a   Terazaki, Yoshinori ^a   Mochizuki, Hiroshi ^a   Nakagawa, Akio ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; HIGH TEMPERATURE OPERATIONS; LOGIC CIRCUITS; OXIDES; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; SUBSTRATES;

ANALOG CIRCUITS; BURIED OXIDE LAYER; TRENCH ISOLATION;

MOSFET DEVICES;

EID: 0029492057     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)