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Volumn , Issue , 1995, Pages 679-682
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Trench isolation for 0.45 μm active pitch and below
a a a a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
CMOS INTEGRATED CIRCUITS;
ELECTRIC CONDUCTIVITY;
ELECTRIC FIELDS;
ETCHING;
GATES (TRANSISTOR);
MOSFET DEVICES;
OXIDATION;
OXIDES;
RANDOM ACCESS STORAGE;
SEMICONDUCTING SILICON;
SEMICONDUCTOR DEVICE MANUFACTURE;
SUBSTRATES;
ACTIVE EDGE ROUNDING;
ACTIVE PITCH;
LATCH UP HOLDING VOLTAGE;
SUB THRESHOLD CONDUCTION;
TRENCH ISOLATION TECHNOLOGY;
MOS DEVICES;
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EID: 0029491764
PISSN: 01631918
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (35)
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References (13)
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