Novel on-chip electrostatic discharge (ESD) protection for beyond 500MHz DRAM

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1995, Pages 539-542

  Narita, Kaoru ^a   Horiguchi, Yoko ^a   Fujii, Takeo ^a   Nakamura, Kunio ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; ELECTRIC CURRENTS; ELECTRIC DISCHARGES; ELECTRIC NETWORK SYNTHESIS; ELECTROSTATICS; MODELS; PROTECTION; RANDOM ACCESS STORAGE; TRANSISTORS;

CHARGE DEVICE MODEL; COMMON DISCHARGE LINE; ELECTROSTATIC DISCHARGE; HUMAN BODY MODEL; MACHINE MODEL; ON CHIP ELECTROSTATIC DISCHARGE PROTECTION;

LSI CIRCUITS;

EID: 0029491316     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)