Design methodologies for partially reconfigured systems

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1995, Pages 78-84

  Hadley, J D ^a   Hutchings, B L ^a  

^a BRIGHAM YOUNG UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; NEURAL NETWORKS; SOFTWARE PROTOTYPING;

COMPILE TIME RECONFIGURATION; FIELD PROGRAMMABLE GATE ARRAY; FLEXIBLE COMPUTING SYSTEMS; RUN TIME RECONFIGURABLE ARTIFICIAL NEURAL NETWORKS;

COMPUTER AIDED LOGIC DESIGN;

EID: 0029490721     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)