Hierarchical critical area extraction with the EYE tool

IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 1995, Pages 28-36

  Allan, Gerard A ^a   Walton, Anthony J ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; DEFECTS; DIGITAL INTEGRATED CIRCUITS; FAILURE ANALYSIS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; OPTIMIZATION; PROBABILITY; VLSI CIRCUITS;

CRITICAL AREAS; EDINBURG YIELD ESTIMATOR; FAULT PROBABILITY MAPS; HIERARCHICAL EXTRACTION; VISUALIZATION AIDS;

COMPUTER AIDED SOFTWARE ENGINEERING;

EID: 0029490522     PISSN: 10636722     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)