3.5-Gb/s x 4-Ch Si bipolar LSI's for Optical Interconnections

IEEE Journal of Solid-State Circuits

Volumn 30, Issue 12, 1995, Pages 1493-1501

  Arai, Yoshimitsu ^a   Hino, Shigeki ^b   Tanaka, Nobuyuki ^a   Kobayashi, Yoshiji ^a   Akazawa, Yukio ^a  

^a NTT CORPORATION   (Japan)

^b NTT Network Service Systems Laboratories   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE FILTERING; ASYNCHRONOUS TRANSFER MODE; CIRCUIT OSCILLATIONS; ENERGY DISSIPATION; INTEGRATED CIRCUIT LAYOUT; MULTIPLEXING EQUIPMENT; OPTICAL INTERCONNECTS; PHASE LOCKED LOOPS; STABILITY; SWITCHING SYSTEMS; TIMING CIRCUITS; TRANSCEIVERS;

ANALOG PHASE LOCKED LOOPS; AUTOMATIC CANCELLING TECHNIQUE; DEMULTIPLEXERS; HIGH SPEED CLOCK; SILICON BIPOLAR LSI;

LSI CIRCUITS;

EID: 0029488306     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.482197     Document Type: Article

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