Memory bank and register allocation in software synthesis for ASIPs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1995, Pages 388-392

  Sudarsanam, Ashok ^a   Malik, Sharad ^a  

^a PRINCETON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; DIGITAL SIGNAL PROCESSING; GRAPH THEORY; PARALLEL PROCESSING SYSTEMS; PROGRAM COMPILERS; SIMULATED ANNEALING; STORAGE ALLOCATION (COMPUTER);

APPLICATION SPECIFIC PROCESSORS (ASIP); MULTIPLE DATA MEMORY BANKS; REGISTER ALLOCATION; SOFTWARE SYNTHESIS;

SOFTWARE ENGINEERING;

EID: 0029487859     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)