Synthesis of mapping logic for generating transformed pseudo-random patterns for BIST

IEEE International Test Conference (TC)

Volumn , Issue , 1995, Pages 674-682

  Touba, Nur A ^a   McCluskey, Edward J ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONFORMAL MAPPING; ERROR DETECTION; ITERATIVE METHODS; LOGIC CIRCUITS; MATRIX ALGEBRA; PROBABILITY;

BUILT IN SELF TEST; CIRCUIT UNDER TEST; FAULT COVERAGE; PSEUDO RANDOM GENERATOR;

LOGIC DESIGN;

EID: 0029487280     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (22)