Fault emulation: A new approach to fault grading

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1995, Pages 681-686

  Cheng, Kwang Ting ^a   Huang, Shi Yu ^a   Dai, Wei Jin ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FAULT CURRENTS; GATES (TRANSISTOR); INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; VLSI CIRCUITS;

FAULT EMULATION ALGORITHM; FAULT GRADING; FIELD PROGRAMMABLE GATE ARRAYS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0029485355     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)