A Single-Chip 900 MHz CMOS Receiver Front-End with a High Performance Low-IF Topology

IEEE Journal of Solid-State Circuits

Volumn 30, Issue 12, 1995, Pages 1483-1492

  Crols, Jan ^a   Steyaert, Michel S J ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS; ELECTRIC CONVERTERS; ELECTRIC NETWORK TOPOLOGY; FREQUENCY SYNTHESIZERS; INTEGRATED CIRCUIT LAYOUT; PERFORMANCE; SIGNAL RECEIVERS;

CMOS RECEIVER FRONT END; DEGREE OF INTEGRATION; DOUBLE QUADRATURE DOWNCOVERTERS; LOW NOISE AMPLIFIERS; PHASE ACCURACY;

LINEAR INTEGRATED CIRCUITS;

EID: 0029485143     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.482196     Document Type: Article

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