Delay balanced multipliers for low power/low voltage DSP core

IEEE Symposium on Low Power Electronics

Volumn , Issue , 1995, Pages 36-37

  Sakuta, Toshiyuki ^a   Lee, Wai ^a   Balsara, Poras T ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; BUFFER CIRCUITS; COMPUTER SIMULATION; DELAY CIRCUITS; ENERGY DISSIPATION; MULTIPLYING CIRCUITS; PORTABLE EQUIPMENT;

ARRAY MULTIPLIER; BOOTH MULTIPLIER; CARRY LOOKAHEAD ADDER; DELAY BALANCED MULTIPLIERS; POWER DISSIPATION; SPURIOUS TRANSITIONS; VALID TRANSITIONS; WALLACE TREE MULTIPLIERS;

DIGITAL SIGNAL PROCESSING;

EID: 0029482966     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)