Application of Ti SALICIDE process on ultra-thin SIMOX wafer

IEEE International SOI Conference

Volumn , Issue , 1995, Pages 30-31

  Azuma, K ^a   Kishi, A ^a   Tanigawa, M ^a   Kaneko, S ^a   Naka, T ^a   Ishihama, A ^a   Iguchi, K ^a   Sakiyama, K ^a  

^a SHARP CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CMOS INTEGRATED CIRCUITS; DIFFUSION; DOPING (ADDITIVES); ELECTRIC CONDUCTIVITY; ELECTRIC PROPERTIES; GATES (TRANSISTOR); METALLIC FILMS; OXIDATION; SILICON WAFERS; TITANIUM; ULTRATHIN FILMS;

DIFFUSION RESISTIVITY; SALICIDATION; SHEET RESISTIVITY; TITANIUM SILICIDE PROCESS; ULTRATHIN SUPERFICIAL SILICON LAYER;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0029480830     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)