Rational clocking

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1995, Pages 271-278

  Sarmenta, Luis F G ^a   Pratt, Gill A ^a   Ward, Stephen A ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COSTS; DATA TRANSFER; FREQUENCIES; PERFORMANCE; PHASE LOCKED LOOPS; PROBABILITY; SYNCHRONIZATION; TABLE LOOKUP; TIMING CIRCUITS;

ALGORITHMICALLY TIME COMMUNICATIONS; COINCIDENCE PERIOD; FREQUENCY RATIO; RATIONAL CLOCKING;

DIGITAL COMMUNICATION SYSTEMS;

EID: 0029476166     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)