Performance-oriented placement and routing for field-programmable gate arrays

European Design Automation Conference - Proceedings

Volumn , Issue , 1995, Pages 80-85

  Alexander, Michael J ^a   Cohoon, James P ^a   Ganley, Joseph L ^a   Robins, Gabriel ^a  

^a UNIVERSITY OF VIRGINIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN AIDS; ELECTRIC WIRING; GRAPH THEORY; HEURISTIC METHODS; LOGIC GATES; PERFORMANCE; RECURSIVE FUNCTIONS;

FIELD PROGRAMMABLE GATE ARRAYS; PERFORMANCE ORIENTED PLACEMENT; QUADRISECTION; ROUTING; THUMBNAIL PARTITIONING;

COMPUTER AIDED LOGIC DESIGN;

EID: 0029474110     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (32)