On generating compact test sequences for synchronous sequential circuits

European Design Automation Conference - Proceedings

Volumn , Issue , 1995, Pages 105-110

  Pomeranz, Irith ^a   Reddy, Sudhakar M ^a  

^a UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTER SIMULATION; ELECTRIC FAULT CURRENTS; ELECTRIC FAULT LOCATION; FAILURE ANALYSIS; LOGIC GATES;

COMPACT TEST SEQUENCES; FAULT ORIENTED CRITERIA; FAULT-INDEPENDENT; SYNCHRONOUS SEQUENTIAL CIRCUITS; TEST APPLICATION TIME;

SEQUENTIAL CIRCUITS;

EID: 0029473813     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)