Application of the thermal network method to the transient thermal analysis of multichip modules

Proceedings of the IEEE/CPMT International Electronic Manufacturing Technology (IEMT) Symposium

Volumn , Issue , 1995, Pages 464-467

  Ishizuka, Masaru ^a   Hisano, Katsumi ^a   Sasaki, Tomiya ^a   Fukuoka, Yoshitaka ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; ELECTRIC WIRING; ELECTRONICS PACKAGING; HEAT TRANSFER; MATHEMATICAL MODELS; NATURAL CONVECTION; PRINTED CIRCUIT BOARDS; SURFACE PHENOMENA; TEMPERATURE DISTRIBUTION; TEMPERATURE MEASUREMENT; THERMOANALYSIS; TRANSISTORS;

HIGH DENSITY MULTICHIP PACKAGING TECHNOLOGY; POWER DISSIPATION; POWER TRANSISTOR CHIPS; TEMPERATURE RISE; THERMAL NETWORK METHOD; TRANSIENT THERMAL ANALYSIS;

MULTICHIP MODULES;

EID: 0029458683     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)