A 200 MHz Pipelined Multiplier Using 1.5 V-Supply Multiple-Valued MOS Current-Mode Circuits with Dual-Rail Source-Coupled Logic

IEEE Journal of Solid-State Circuits

Volumn 30, Issue 11, 1995, Pages 1239-1245

  Hanyu, Takahiro ^a   Kameyama, Michitaka ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; CURRENT VOLTAGE CHARACTERISTICS; DIGITAL CIRCUITS; FREQUENCY MULTIPLYING CIRCUITS; MOS DEVICES;

ARITHMETIC SYSTEM; DYNAMIC BINARY STORAGE SCHEME; LATCHED SIGNED DIGIT FULL ADDER; LATCHED THRESHOLD DETECTOR; MULTIVALUED CURRENT MODE INTEGRATED CIRCUITS; SOURCED COUPLED LOGIC CIRCUITS; SWITCHING DELAY;

LOGIC CIRCUITS;

EID: 0029410535     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.475711     Document Type: Article

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