The architecture of a high performance mass store with gmr memory cells

IEEE Transactions on Magnetics

Volumn 31, Issue 6, 1995, Pages 3200-3202

  Pohm, A V ^a   Daughton, J M ^a   Brown, J ^a   Beech, R ^a  

^a NVE CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CALCULATIONS; COERCIVE FORCE; COMPUTER ARCHITECTURE; MAGNETIC ANISOTROPY; MAGNETORESISTANCE; PERFORMANCE; SILICON WAFERS;

GIANT MAGNETORESISTANCE; SUBMICRON MEMORY CELLS;

MAGNETIC STORAGE;

EID: 0029403376     PISSN: 00189464     EISSN: 19410069     Source Type: Journal    
DOI: 10.1109/20.490327     Document Type: Article

References (5)

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2. K. Spears, A. V. Pohm, J. M. Daughton, R. Sinclair, J. Brown, “The Architecture of Wafer Scale Memories with Giant Magneto-resistance Memory Cells” Proceeding of the Nonvolatile Memory Technology Review 1993, pp 101, June 1993
3. E. Y. Chen, A. V. Pohm, J. M. Daughton, J. Brown, W. C. Black, “High Sensitivity, End-on, Ganged, Read Head Sensors”, IEEE Trans. Magn. 30 #6, pp 3816–18, (November 1994)
4. S. Y. Yuan, H. N. Bertram, J. F. Smyth, S. Schultz, “Size Effects of Switching Fields of Thin Permalloy Particles, IEEE Trans. Magn. 28 #5, pp 3171–3 (September 1992)
5. J. Gee. M. Hill, D. Pnevmatrklatos, A. Smith, “Cache Performance of the SPEC92 Benchmark Suite” IEEE MICRO 13 #4, pp 17–27 (August 1993)