Performance Analysis of Four Memory Consistency Models for Multithreaded Multiprocessors

IEEE Transactions on Parallel and Distributed Systems

Volumn 6, Issue 10, 1995, Pages 1085-1099

  Chong, Yong Kim ^a   Hwang, Kai ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

context; Distributed shared memory; latency hiding techniques; memory consistency mobels; multithreaded processors; performance evaluation; scalable multiprocessors; stochastic Petri nets; switching

Indexed keywords

BANDWIDTH; BUFFER STORAGE; COMPUTER NETWORKS; COMPUTER SELECTION AND EVALUATION; COMPUTER SIMULATION; DATA COMMUNICATION SYSTEMS; DATA STORAGE EQUIPMENT; MARKOV PROCESSES; PERFORMANCE; PETRI NETS; SYNCHRONIZATION; TELECOMMUNICATION TRAFFIC;

CONTEXT SWITCHING; DISTRIBUTED SHARED MEMORY; LATENCY HIDING TECHNIQUES; MEMORY CONSISTENCY MODELS; MULTITHREADED MULTIPROCESSORS; PERFORMANCE EVALUATION; PROCESSORS; SCALABLE MULTIPROCESSORS; STOCHASTIC TIMED PETRI NETS;

MULTIPROCESSING SYSTEMS;

EID: 0029390137     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.473517     Document Type: Article

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