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Volumn 42, Issue 10, 1995, Pages 642-660

A Performance Analysis of Pulse Stream Neural and Fuzzy Computing Systems

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; COMPUTER HARDWARE; MATRIX ALGEBRA; MODULATION; MULTIPLEXING; PERFORMANCE; RESPONSE TIME (COMPUTER SYSTEMS); VECTORS;

EID: 0029389703     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.471393     Document Type: Article
Times cited : (46)

References (54)
  • 1
    • 0026116469 scopus 로고
    • Pulse-stream VLSI neural networks mixing analog and digital techniques
    • Mar.
    • A. F. Murray, D. Del Corso, and L. Tarassenko, “Pulse-stream VLSI neural networks mixing analog and digital techniques,” IEEE Trans. Neural Networks, vol. 2, pp. 193-204, Mar. 1991.
    • (1991) IEEE Trans. Neural Networks , vol.2 , pp. 193-204
    • Murray, A.F.1    Del Corso, D.2    Tarassenko, L.3
  • 2
    • 0023643889 scopus 로고
    • Asynchronous arithmetic for VLSI neural systems
    • June
    • A. F. Murray and A. V. W. Smith, “Asynchronous arithmetic for VLSI neural systems,” Electron. Lett., vol. 23, pp. 642-643, June 1987.
    • (1987) Electron. Lett , vol.23 , pp. 642-643
    • Murray, A.F.1    Smith, A.V.W.2
  • 3
    • 0023361987 scopus 로고
    • Asynchronous VLSI Neural networks using pulse stream arithmetic
    • June
    • “Asynchronous VLSI Neural networks using pulse stream arithmetic,” IEEE J. Solid- State Circuits, vol. 23, pp. 688-697, June 1988.
    • (1988) IEEE J. Solid- State Circuits , vol.23 , pp. 688-697
  • 5
    • 0024946516 scopus 로고
    • Pulse arithmetic in VLSI neural network
    • Dec.
    • A. Murray, “Pulse arithmetic in VLSI neural network,” IEEE MICRO, vol. 9, pp. 64-74, Dec. 1989.
    • (1989) IEEE MICRO , vol.9 , pp. 64-74
    • Murray, A.1
  • 8
    • 0024663855 scopus 로고
    • T. neural network implementation based on pulse density modulation
    • San Diego, CA May
    • J. Tomberg, T. neural network implementation based on pulse density modulation,” Custom Integral Circuits Conf., San Diego, CA, May 1989.
    • (1989) Custom Integral Circuits Conf.
    • Tomberg, J.1
  • 10
    • 84941542292 scopus 로고
    • Procedimento e Dispositivo per la Moltiplicazione di Segnali, particolarmente per Sinapsi di Reti Neuronali
    • Apr.
    • L. M. Reyneri, “Procedimento e Dispositivo per la Moltiplicazione di Segnali, particolarmente per Sinapsi di Reti Neuronali,” Patent 67315-A/90 (I), Apr. 27, 1990.
    • (1990) Patent 67315-A/90 (I)
    • Reyneri, L.M.1
  • 11
    • 0008346320 scopus 로고
    • A neural vector matrix multiplier using pulse width modulation techniques
    • Oct.
    • L. M. Reyneri and M. Sartori, “A neural vector matrix multiplier using pulse width modulation techniques,” in Proc. 2 Int. Conf. Microelectron. Neural Networks, Munich, Germany, Oct. 1991, pp. 269-272.
    • (1991) Proc. 2 Int. Conf. Microelectron. Neural Networks , pp. 269-272
    • Reyneri, L.M.1    Sartori, M.2
  • 13
    • 84941531437 scopus 로고
    • A pattern recognition demonstrator based on a silicon neural chip
    • Sept.
    • D. Del Corso, F. Gregoretti, L. M. Reyneri, and A. Allasia, “A pattern recognition demonstrator based on a silicon neural chip,” in Proc. ESSC1RC, Copenhagen, Denmark, Sept. 1992, pp. 207-212.
    • (1992) Proc. ESSC1RC , pp. 207-212
    • Del Corso, D.1    Gregoretti, F.2    Reyneri, L.M.3    Allasia, A.4
  • 18
    • 0024881237 scopus 로고
    • A digital neuro-chip with unlimited connectability for large scale neural networks
    • Y. Haria, “A digital neuro-chip with unlimited connectability for large scale neural networks,” in Proc. IJCNN, Washington, 1989, pp. 163-169.
    • (1989) Proc. IJCNN , pp. 163-169
    • Haria, Y.1
  • 19
    • 0025505497 scopus 로고
    • Pulse-density modulation technique in VLSI implementations of neural network algorithms
    • Oct.
    • J. E. Tomberg and K. Kaski, “Pulse-density modulation technique in VLSI implementations of neural network algorithms,” IEEE J. Solid-State Circuits, vol. 25, pp. 1277-1286, Oct. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , pp. 1277-1286
    • Tomberg, J.E.1    Kaski, K.2
  • 20
    • 0026869114 scopus 로고
    • A scalable optoelectronic neural system using free-space optical interconnect
    • May
    • A. V. Krisnamoorthy, G. Yajla, and S. C. Esener, “A scalable optoelectronic neural system using free-space optical interconnect,” IEEE Trans. Neural Networks, vol. 3, pp. 404-413, May 1992.
    • (1992) IEEE Trans. Neural Networks , vol.3 , pp. 404-413
    • Krisnamoorthy, A.V.1    Yajla, G.2    Esener, S.C.3
  • 21
    • 0026866932 scopus 로고
    • An analog neural hardware implementation using charge-injection multipliers and neuron-specific gain control
    • May
    • L. W. Massengill and D. B. Mundie, “An analog neural hardware implementation using charge-injection multipliers and neuron-specific gain control,” IEEE Trans. Neural Networks, vol. 3, pp. 354-362, May 1992.
    • (1992) IEEE Trans. Neural Networks , vol.3 , pp. 354-362
    • Massengill, L.W.1    Mundie, D.B.2
  • 23
    • 0027864104 scopus 로고
    • coherent pulse width and edge modulations in artificial neural systems
    • Dec.
    • L. M. Reyneri, M. Chiaberge, D. Del Gregoretti, coherent pulse width and edge modulations in artificial neural systems,” Int. J. Neural Systems, vol. 4, no. 4, pp. 407-118, Dec. 1993.
    • (1993) Int. J. Neural Systems , vol.4 , Issue.4 , pp. 118-407
    • Reyneri, L.M.1    Chiaberge, M.2    Del Gregoretti, D.3
  • 24
    • 0348077837 scopus 로고
    • Hardware implementations of artificial neural networks
    • June
    • D. Del Corso, “Hardware implementations of artificial neural networks,” in Proc. IWANN, Barcelona, Spain, June 1993, pp. 405-419.
    • (1993) Proc. IWANN , pp. 405-419
    • Del Corso, D.1
  • 25
    • 4244185882 scopus 로고
    • Implementation of a multi-layer perceptron using pulse-stream techniques
    • Feb.
    • T. Claasen-Vujcic, “Implementation of a multi-layer perceptron using pulse-stream techniques,” M.S. thesis, Tech. Univ. Eindhoven, Eindhoven, The Netherlands, Feb. 1993.
    • (1993) M.S. thesis
    • Claasen-Vujcic, T.1
  • 26
    • 84941530751 scopus 로고
    • Dec.
    • IEEE MICRO, Dec. 1989.
    • (1989) IEEE MICRO
  • 27
    • 0008393590 scopus 로고
    • A comparison between analog and pulse stream VLSI hardware for neural networks and fuzzy systems
    • Sept.
    • L. M. Reyneri, H. C. A. M. Withagen, J. A. Hegt, and M. Chiaberge, “A comparison between analog and pulse stream VLSI hardware for neural networks and fuzzy systems,” in Proceedings of MICRONEURO ’94. Torino, Italy: IEEE Computer Society Press, Sept. 1994, pp. 77-86.
    • (1994) Proceedings of MICRONEURO ’94. Torino , pp. 77-86
    • Reyneri, L.M.1    Withagen, H.C.A.M.2    Hegt, J.A.3    Chiaberge, M.4
  • 28
    • 84934459699 scopus 로고
    • CINTIA: A neuro-fuzzy real time controller for low power embedded systems
    • Sept.
    • L. M. Reyneri, M. Chiaberge, and L. Zocca, “CINTIA: A neuro-fuzzy real time controller for low power embedded systems,” in Proceedings of MICRONEURO ’94 Torino, Italy: IEEE Computer Society Press, Sept. 1994, pp. 392-104.
    • (1994) Proceedings of MICRONEURO ’94 Torino , pp. 104-392
    • Reyneri, L.M.1    Chiaberge, M.2    Zocca, L.3
  • 29
    • 0028429267 scopus 로고
    • A communication architecture tailored for analog VLSI artificial neural networks: Intrinsic performance and limitations
    • May
    • A. Mortara and E. Vittoz, “A communication architecture tailored for analog VLSI artificial neural networks: Intrinsic performance and limitations,” IEEE Trans. Neural Networks, vol. 5, pp. 459-466, May 1994.
    • (1994) IEEE Trans. Neural Networks , vol.5 , pp. 459-466
    • Mortara, A.1    Vittoz, E.2
  • 30
    • 84941528840 scopus 로고
    • June
    • IEEE MICRO, June 1994.
    • (1994) IEEE MICRO
  • 31
    • 0006137788 scopus 로고
    • A review of RAM based neural networks
    • Sept.
    • J. Austin, “A review of RAM based neural networks,” in Proceedings of MICRONEURO ’94. Torino, Italy: IEEE Computer Society Press, Sept. 1994, pp. 58-66.
    • (1994) Proceedings of MICRONEURO ’94. Torino , pp. 58-66
    • Austin, J.1
  • 32
    • 84941533072 scopus 로고
    • VLSI implementation of a pulse-coded winner-take-all network
    • June
    • J. L. Meador and P. D. Hylander, “VLSI implementation of a pulse-coded winner-take-all network,” in Proc. WCNN ’94, San Diego, CA, June 1994, pp. 11-512-518.
    • (1994) Proc. WCNN ’94 , pp. 11-512
    • Meador, J.L.1    Hylander, P.D.2
  • 33
    • 84941529107 scopus 로고
    • Analog VLSI neuromorph with spatially extensive dendritic tree
    • June
    • J. G. Elias and D. P. M. Northmore, “Analog VLSI neuromorph with spatially extensive dendritic tree,” in Proc. WCNN ’94, San Diego, CA, June 1994, pp. 11-543-548.
    • (1994) Proc. WCNN ’94 , pp. 11-543
    • Elias, J.G.1    Northmore, D.P.M.2
  • 34
    • 84941529156 scopus 로고
    • Temporal binding in analog VLSI
    • June
    • S. R. Deiss, “Temporal binding in analog VLSI,” in Proc. WCNN 94, San Diego, CA, June 1994, pp. 11-601-606.
    • (1994) Proc. WCNN 94 , pp. 11-601
    • Deiss, S.R.1
  • 35
    • 0027591331 scopus 로고
    • Silicon auditory processors as computer peripherals
    • Lazzaro et al., “Silicon auditory processors as computer peripherals,” IEEE Trans. Neural Networks, vol. 4, pp. 523-528, 1993.
    • (1993) IEEE Trans. Neural Networks , vol.4 , pp. 523-528
  • 37
    • 33747410393 scopus 로고
    • An addressable 256 x 256 Photodiode Image Sensor Array with an 8-bit Digital Ouatput
    • Sept.
    • C. Jansson, P. Ingelhag, C. Svensson, and R. Forchheimer, “An addressable 256 x 256 Photodiode Image Sensor Array with an 8-bit Digital Ouatput,” in Proc. ESSCIRC, Copenhagen, Denmark, Sept. 1992, pp. 151-154.
    • (1992) Proc. ESSCIRC , pp. 151-154
    • Jansson, C.1    Ingelhag, P.2    Svensson, C.3    Forchheimer, R.4
  • 38
    • 0026925033 scopus 로고
    • A CMOS pulse-width modulator/pulse-amplitude modulator for four-quadrant analog multipliers
    • Sept.
    • B. A. De Cock, D. Maurissens, and J. Cornelis, “A CMOS pulse-width modulator/pulse-amplitude modulator for four-quadrant analog multipliers" IEEE J. Solid-State Circuits, vol. 27, Sept. 1992, pp. 1289-1293.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 1289-1293
    • De Cock, B.A.1    Maurissens, D.2    Cornelis, J.3
  • 39
    • 84941527034 scopus 로고
    • Bridge to frequency converter for smart thermal flow-sensor
    • Sept.
    • G. J. A. van Dijk and J. H. Huijsing, “Bridge to frequency converter for smart thermal flow-sensor,” in Proc. ESSCIRC, Copenhagen, Denmark, Sept. 1992, pp. 347-250.
    • (1992) Proc. ESSCIRC , pp. 250-347
    • van Dijk, G.J.A.1    Huijsing, J.H.2
  • 40
  • 46
    • 0024909727 scopus 로고
    • An electrically trainable artificial neural network (ETANN) with 10240 floating gate synapses
    • M. Holler, S. Tam, H. Castro, and R. Benson, “An electrically trainable artificial neural network (ETANN) with 10240 floating gate synapses,” in Proc. IEEE 3rd Int. Conf. Neural Networks, Washington, 1989, pp. 191-196.
    • (1989) Proc. IEEE 3rd Int. Conf. Neural Networks , pp. 191-196
    • Holler, M.1    Tam, S.2    Castro, H.3    Benson, R.4
  • 49
    • 0008319242 scopus 로고
    • Analog EEPROM principle and application to network
    • H. J. Oguey, “Analog EEPROM principle and application to network,” in Proc. ISSCC ’90, 1990.
    • (1990) Proc. ISSCC ’90
    • Oguey, H.J.1
  • 50
    • 0026866965 scopus 로고
    • Comparison of floating gate neural network memory cells in standard VLSI CMOS technology
    • May
    • D. A. Durfee and F. S. Shoucair, “Comparison of floating gate neural network memory cells in standard VLSI CMOS technology,” IEEE Trans. Neural Networks, vol. 3, pp. 347-353, May 1992.
    • (1992) IEEE Trans. Neural Networks , vol.3 , pp. 347-353
    • Durfee, D.A.1    Shoucair, F.S.2
  • 53
    • 0026396071 scopus 로고
    • An analysis on the silicon implementations of backpropagation algorithms for artificial neural networks
    • Dec.
    • L. M. Reyneri and E. Filippi, “An analysis on the silicon implementations of backpropagation algorithms for artificial neural networks,” IEEE Trans. Comput., vol. 40, pp. 1380-1389, Dec. 1991.
    • (1991) IEEE Trans. Comput. , vol.40 , pp. 1380-1389
    • Reyneri, L.M.1    Filippi, E.2


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