A Novel Modular Systolic Array Architecture for Full-Search Block Matching Motion Estimation

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 5, Issue 5, 1995, Pages 407-416

  Yeo, Hangu ^a   Hu, Yu Hen ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATION THEORY; CONSTRAINT THEORY; DATA STRUCTURES; HIGH DEFINITION TELEVISION; IMAGE COMMUNICATION SYSTEMS; MATHEMATICAL TRANSFORMATIONS; PARAMETER ESTIMATION;

DATA MOVEMENT PATTERN; FULL SEARCH BLOCK MATCHING MOTION ESTIMATION; PICTURE FORMAT; SYSTEM LEVEL INPUT/OUTPUT CONSTRAINTS; SYSTOLIC ARRAY ARCHITECTURE; THROUGHPUT RATE;

SYSTOLIC ARRAYS;

EID: 0029388105     PISSN: 10518215     EISSN: 15582205     Source Type: Journal    
DOI: 10.1109/76.473553     Document Type: Article

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