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Volumn 42, Issue 9, 1995, Pages 1709-1711

Zero-Temperature-Coefficient Biasing Point of Partially Depleted SOI MOSFET's

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE CARRIERS; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC CURRENTS; ELECTRIC FIELDS; GATES (TRANSISTOR); MATHEMATICAL MODELS; SILICON ON INSULATOR TECHNOLOGY; THERMAL EFFECTS; VOLTAGE CONTROL;

EID: 0029379301     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.405293     Document Type: Article
Times cited : (45)

References (11)
  • 1
    • 0024716139 scopus 로고
    • Analytical and experimental methods for Zero-temperature-coefficient biasing of MOS transistors
    • F. S. Shoucair, “Analytical and experimental methods for Zero-temperature-coefficient biasing of MOS transistors,” Electrons Lett., vol. 25, pp. 1196–1198, 1989.
    • (1989) Electrons Lett. , vol.25 , pp. 1196-1198
    • Shoucair, F.S.1
  • 2
    • 0026880758 scopus 로고
    • The determination of zero temperature coefficient point in CMOS transistors
    • Z. Prijic, S. S. Dimitrijev, and N. Stojadinovic, “The determination of zero temperature coefficient point in CMOS transistors,” Microelectron. Reliab., vol. 32, no. 6, pp. 769–773, 1992.
    • (1992) Microelectron. Reliab. , vol.32 , Issue.6 , pp. 769-773
    • Prijic, Z.1    Dimitrijev, S.S.2    Stojadinovic, N.3
  • 4
    • 0026219658 scopus 로고
    • A temperature-dependent SOI MOSFET model for high-temperature application (27°C–300°C)
    • D. S. Jeon and D. E. Burk, “A temperature-dependent SOI MOSFET model for high-temperature application (27°C–300°C),” IEEE Trans. Electron Devices, vol. 38, no. 9, pp. 2101–2110, 1991.
    • (1991) IEEE Trans. Electron Devices , vol.38 , Issue.9 , pp. 2101-2110
    • Jeon, D.S.1    Burk, D.E.2
  • 8
    • 0021405436 scopus 로고
    • Current-voltage charateristics of thin film SOI MOSFET's in strong inversion
    • H. K. Lim and J. G. Fossum, “Current-voltage charateristics of thin film SOI MOSFET's in strong inversion,” IEEE Trans. Electron Devices, vol. ED-31, no. 4, pp. 401–408, 1984.
    • (1984) IEEE Trans. Electron Devices , vol.ED-31 , Issue.4 , pp. 401-408
    • Lim, H.K.1    Fossum, J.G.2
  • 9
    • 0026943562 scopus 로고
    • An enhanced SPICE MOSFET model suitable for analog applications
    • J. A. Power and W. A. Lane, “An enhanced SPICE MOSFET model suitable for analog applications,” IEEE Trans. Computer-Aided Design, pp. 1418–1425, 1992.
    • (1992) IEEE Trans. Computer-Aided Design , pp. 1418-1425
    • Power, J.A.1    Lane, W.A.2
  • 10
    • 84876716278 scopus 로고
    • Design consideration in high temperature analog CMOS integrated circuits
    • F. S. Shoucair, “Design consideration in high temperature analog CMOS integrated circuits,” IEEE Trans. Comp., Hybrids, Manuf. Technol., vol. CHMT-9, no. 3, pp. 242–251, 1986.
    • (1986) IEEE Trans. Comp., Hybrids, Manuf. Technol. , vol.CHMT-9 , Issue.3 , pp. 242-251
    • Shoucair, F.S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.