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Volumn 14, Issue 9, 1995, Pages 1093-1097

A Voltage Dependent Capacitance Model Including Effects of Manufacturing Process Variabilities on Voltage Coefficients

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; INTEGRATED CIRCUIT MANUFACTURE; MONTE CARLO METHODS; POLYNOMIALS; SEMICONDUCTOR DEVICE MODELS; VOLTAGE CONTROL;

EID: 0029378201     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.406711     Document Type: Article
Times cited : (5)

References (9)
  • 2
    • 0021501913 scopus 로고
    • CASTAM: A process variation analysis simulator for MOS LSI's
    • Oct.
    • Y. Aoki, T. Toyabe, S. Asai, and T. Hagiwara, “CASTAM: A process variation analysis simulator for MOS LSI's,” IEEE Trans. Electron Devices, vol. ED-31, no. 10, pp. 1462–1467, Oct. 1983.
    • (1983) IEEE Trans. Electron Devices , vol.ED-31 , Issue.10 , pp. 1462-1467
    • Aoki, Y.1    Toyabe, T.2    Asai, S.3    Hagiwara, T.4
  • 4
    • 0025384808 scopus 로고
    • Fully differential ADC with rail-to-rail common-mode range and nonlinear capacitor compensation
    • Feb.
    • R. K. Hester, K.-S. Tan, M. DeWit, J. W. Fattruso, S. Kiaki, and J. R. Heliums, “Fully differential ADC with rail-to-rail common-mode range and nonlinear capacitor compensation,” IEEE J. Solid-State Circuits, vol. 25, no. 1, pp. 173–199, Feb. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.1 , pp. 173-199
    • Hester, R.K.1    Tan, K.-S.2    DeWit, M.3    Fattruso, J.W.4    Kiaki, S.5    Heliums, J.R.6
  • 5
    • 0020737810 scopus 로고
    • An efficient numerical algorithm for simulation of MOS capacitance
    • Apr.
    • R. C. Jaeger, F. H. Gaensslen, and S. E. Diehl, “An efficient numerical algorithm for simulation of MOS capacitance,” IEEE Trans. Computer-Aided Design, vol. CAD-2, no. 2, pp. 111–116, Apr. 1983.
    • (1983) IEEE Trans. Computer-Aided Design , vol.CAD-2 , Issue.2 , pp. 111-116
    • Jaeger, R.C.1    Gaensslen, F.H.2    Diehl, S.E.3
  • 6
    • 0022112804 scopus 로고
    • Capacitance-voltage characteristics of semiconductor-insulator-semiconductor (SIS) structure
    • K. Nagai, T. Sekigawa, and Y. Hayashi, “Capacitance-voltage characteristics of semiconductor-insulator-semiconductor (SIS) structure,” Solid State Electron., vol. 28, no. 8, pp. 789–798, 1985.
    • (1985) Solid State Electron. , vol.28 , Issue.8 , pp. 789-798
    • Nagai, K.1    Sekigawa, T.2    Hayashi, Y.3
  • 8
    • 84933454533 scopus 로고
    • Modeling of voltage dependent capacitors with Spice
    • May
    • D.-I. R. Unterricker, “Modeling of voltage dependent capacitors with Spice,” IEEE Circuits & Devices, vol. 6, no. 3, pp. 10–11, May 1990.
    • (1990) IEEE Circuits & Devices , vol.6 , Issue.3 , pp. 10-11
    • Unterricker, D.-I.R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.