A Comprehensive Delay Model for CMOS Inverters

IEEE Journal of Solid-State Circuits

Volumn 30, Issue 8, 1995, Pages 864-871

  Dutta, Santanu ^a   Lusky, Stephen L ^b  

^a PRINCETON UNIVERSITY   (United States)

^b TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC INVERTERS; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRIC WAVEFORMS; GATES (TRANSISTOR);

CMOS INVERTERS; CURRENT VOLTAGE TRAJECTORIES; DELAY MODEL; INPUT RAMP; OUTPUT LOADING; OUTPUT TRANSITION TIME;

SEMICONDUCTOR DEVICE MODELS;

EID: 0029359666     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.400428     Document Type: Article

References (10)

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