PMChip: An ASIC dedicated to Pipelined Read Out and Trigger Systems

IEEE Transactions on Nuclear Science

Volumn 42, Issue 4, 1995, Pages 812-819

  Lai, A ^a   Musa, L ^b  

^a Dipartimento di Fisica dell'Università and INFN sezione di Cagliari ^*

^b UNIVERSITY OF CAGLIARI   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BUFFER STORAGE; DATA STORAGE EQUIPMENT; DIGITAL STORAGE; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; READOUT SYSTEMS; TRIGGER CIRCUITS;

MEMORY LOGIC CONTROL; PIPELINE MEMORY CHIP;

VLSI CIRCUITS;

EID: 0029357225     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/23.467883     Document Type: Article

References (3)

1. The NA48 collaboration, “Proposal for a precision measurement of ε'/ε in CP violation Ko → 2π decays”, CERN/SPSC/90–22, July 1990.
2. L. Musa, “Un sistema di acquisizione privo di tempo morto per l'esperimento NA48 sulla violazione di CP”, Dipartimento di Fisica dell'Università, Cagliari, Italy, Ph. D. thesis, 1994.
3. V. Fanti et al., “Test results from fully pipelined electronic modules for NA48 scintillators”, in preparation.