Thermal Simulation of Thin-Film Interconnect Failure Caused by High Current Pulses

IEEE Transactions on Electron Devices

Volumn 42, Issue 7, 1995, Pages 1386-1388

  Gui, Xiang ^a,b   Dew, Steven K ^a   Brett, Michael J ^a  

^a UNIVERSITY OF ALBERTA   (Canada)

^b BEIJING UNIVERSITY OF TECHNOLOGY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY CONDITIONS; CURRENT DENSITY; GATES (TRANSISTOR); MATHEMATICAL MODELS; PASSIVATION; TEMPERATURE DISTRIBUTION; THERMAL CONDUCTIVITY OF SOLIDS; THERMAL EFFECTS; THIN FILM DEVICES;

CURRENT INDUCED HEATING; CURRENT PULSES; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); METALLIZATION; PULSE DURATION; THERMAL EQUILIBRIUM; THIN FILM INTERCONNECT; VOLTAGE PROGRAMMABLE LINKS (VPL);

VLSI CIRCUITS;

EID: 0029345169     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.391228     Document Type: Article

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