Fault-Tolerant Wormhole Routing Algorithms for Mesh Networks

IEEE Transactions on Computers

Volumn 44, Issue 7, 1995, Pages 848-864

  Boppana, Rajendra V ^a   Chalasani, Suresh ^b  

^a UNIVERSITY OF TEXAS AT SAN ANTONIO   (United States)

^b UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

Adaptive routing; block faults; deadlocks; fault tolerant routing; mesh networks; multicomputer networks; performance evaluation; wormhole routing

Indexed keywords

COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER NETWORKS; COMPUTER SIMULATION; COMPUTER SYSTEM RECOVERY; COMPUTER WORMS; FAULT TOLERANT COMPUTER SYSTEMS; PARALLEL PROCESSING SYSTEMS; PERFORMANCE;

ADAPTIVE ROUTING; BLOCK FAULTS; FAULT TOLERANT ROUTING; MESH NETWORK; PERFORMANCE EVALUATION; WORMHOLE ROUTING;

ADAPTIVE ALGORITHMS;

EID: 0029345012     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.392844     Document Type: Article

References (33)

1. A. Agarwal, D. Chaiken, G. D'souza, K. Johnson, D. Kranz, J. Kubiatowicz, K. Kurihara, B.-H. Lira, G. Maa, D. Nassbaum, M. Parkin, and D. Yeung, “The MIT Alewife machine: A large-scale distributed-memory multiprocessor,” Proc. Workshop on Scalable Shared Memory Multiprocessors, Kluwer Academic Publishers, 1991.
2. L.N. Bhuyan and D.P. Agrawal, “Generalized hypercube and hyperbus structures for a computer network,” IEEE Trans. Computers, vol. 33, no. 4,1984.
3. K. Bolding and L. Snyder, “Overview of fault handling for the chaos router,” Proc. 1991 IEEE Int'l Workshop Defect and Fault Tolerance in VLSI Systems, pp. 124-127, 1991.
4. R.V. Boppana and S. Chalasani, “A comparison of adaptive wormhole routing algorithms,” Proc. 20th Ann. Int'l Symp. Computer Architecture, pp. 351-360, May 1993.
5. S. Borkar, R. Conn, G. Cox S. Gleason, T. Gross, H.T. Kung, M. Lam, B. Moore, C. Peterson, J. Pieper, L. Rankin, PS. Tseng, J. Sutton, J. Ubranski, and J. Webb, “iWarp: An integrated solution to high-speed parallel computing,” Proc. Supercomputing ‘88, pp. 330-339,1988.
6. S. Chalasani and R.V. Boppana, “Fault-tolerant wormhole routing in tori,” Proc. Eighth ACM Int'l Conf. Supercomputing, July 1994.
7. M.-S. Chen and K. Shin, “Dept-first search approach for fault-tolerant routing in hypercube multicomputers,” IEEE Trans. Parallel and Distributed Systems, vol. 1, pp. 152-159, Apr. 1990.
8. A.A. Chien and J.H. Kim, “Planar-adaptive routing: Low-cost adaptive networks for multiprocessors,” Proc. 19th Ann. Int'l Symp. Computer Architecture, pp. 268-277,1992.
9. W.J. Dally, “Network and processor architecture for message-driven computers,” VLSI and Parallel Computation, R. Suaya and G. Birtwislte, eds., ch. 3, pp. 140-222. San Mateo, Calif.: Morgan-Kaufman Publishers, Inc., 1990.
10. W.J. Dally, “Virtual-channel flow control,” IEEE Trans. Parallel and Distributed Systems, vol. 3, pp. 194-205, Mar. 1992.
11. W.J. Dally and H. Aoki, “Deadlock-free adaptive routing in multicomputer networks using virtual channels,” IEEE Trans. Parallel and Distributed Systems, vol. 4, pp. 466-475, Apr. 1993.
12. W.J. Dally and C.L. Seitz, “Deadlock-free message routing in multiprocessor interconnection networks,” IEEE Trans. Computers, vol. 36, no. 5, pp. 547-553,1987.
13. J. Duato, “A new theory of deadlock-free adaptive routing in wormhole networks,” IEEE Trans. Parallel and Distributed Systems, vol. 4, pp. 1,320-1,331, Dec. 1993.
14. S.A. Felperin, L. Gravano, G.D. Pifarre and J.L. Sanz, “Routing techniques for massively parallel communication,” Proc. IEEE, vol. 79, no. 4, pp. 488-503, 1991.
15. P.T. Gaughan and S. Yalamanchili, “Pipelined circuit-switching: A fault-tolerant variant of wormhole routing,” Proc. Fourth IEEE Symp. Parallel and Distributed Processing, pp. 148-155,1992.
16. C.J. Glass and L.M. Ni, “The turn model for adaptive routing,” Proc. 19th Ann. Int'lSymp. Computer Architecture, pp. 278-287, 1992.
17. C.J. Glass and L.M. Ni, “Fault-tolerant wormhole routing in meshes,” 23rd Ann. Int'l Symp. Fault-Tolerant Computing, pp. 240-249,1993.
18. K.D. Gunther, “Prevention of deadlocks in packet-switched data transport systems,” IEEE Trans. Communications, vol. 29, pp. 512-524, Apr. 1981.
19. R. Jain, The Art of Computer Systems Performance Analysis. John Wiley & Sons, Inc., 1991.
20. P. Kermani and L. Kleinrock, “Virtual cut-through: A new computer communication switching technique,” Computer Networks, vol. 3, pp. 267-286,1979.
21. S.S. Lam and M. Reiser, “Congestion control of store-and-forward networks by input buffer limits-An analysis,” IEEE Trans. Communications, vol. 27, pp. 127-133, Jan. 1979.
22. T. Lee and J. Hayes, “A fault-tolerant communication scheme for hypercube computers,” IEEE Trans. Computers, vol. 41, pp. 1,242-1,256, Oct. 1992.
23. R. Leveugle, T. Michel, and G. Saucier, “Design of microprocessors with built-in online test,” 20th Ann. Int'l Symp. Fault-Tolerant Computing, pp. 450-456,1990.
24. S.L. Lillevik, “The Touchstone 30 Gigaflop DELTA prototype,” Sixth Distributed Memory Computing Conf, pp. 671-677, 1991.
25. D.H. Under and J.C. Harden, “An adaptive and fault tolerant wormhole routing strategy for k ary ncubes,” IEEE Trans. Computers, vol. 40, no. 1, pp. 2-12,1991.
26. N.F. Maxemchuk and R. Krishnan, “A comparison of linear and mesh topologies-DQDB and the Manhattan Street network,” IEEE J. Selected Areas in Communications, vol. 11, pp. 1,278-1,289, Oct. 1993.
27. M.D. Noakes, D.A. Wallach, W.J. Dally, “The J-machine multicomputer: An architectural evaluation,” Proc. 20th Ann. Int'l Symp. Computer Architecture, pp. 224-235, May 1993.
28. A.L. Narasimha Reddy and R. Freitas, “Fault tolerance of adaptive routing algoritfims in multicomputers,” Proc. Fourth IEEE Symp. Parallel and Distributed Processing, pp. 156-161, 1992.
29. J.Y. Ngai and C.L. Seitz, “A framework for adaptive routing in multicomputer networks,” Proc. First Symp. on Parallel Algorithms and Architectures, pp. 1-9, 1989.
30. W. Oed, “The Cray Research massively parallel processor system, CRAY T3D,” Technical Report, Cray Research Inc., Nov. 1993.
31. M. Peercy and P. Banerjee, “Distributed algorithms for shortest-path deadlock-free routing and broadcasting in arbitrarily faulty hypercubes,” 20th Ann. Int'l Symp. Fault-Tolerant Computing, pp. 218-225, 1990.
32. C.S. Raghavendra, P.-J. Yang, and S.-B. Tien, “Free dimensions-an effective approach to achieving fault tolerance in hypercubes,” 22nd Ann. Int'lSymp. Fault-Tolerant Computing, pp. 170-177, 1992.
33. C. Seitz, “Concurrent architectures,” VLSI and Parallel Computation, R. Suaya and G. Birtwislte, eds., ch. 1, pp. 1-84, San Mateo, Calif: Morgan-Kaufman Publishers, Inc., 1990.