Prim–Dijkstra Tradeoffs for Improved Performance-Driven Routing Tree Design

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 14, Issue 7, 1995, Pages 890-896

  Kahng, A B ^d   Huang, J H ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c STANFORD UNIVERSITY   (United States)

^d MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; ELECTRIC WIRING; HEURISTIC METHODS; MULTICHIP MODULES; PARAMETER ESTIMATION; PERFORMANCE; TREES (MATHEMATICS); VLSI CIRCUITS;

INTERCONNECTIONS; MINIMUM SPANNING TREE; SHORTEST PATH TREE; STEINER TREE ROUTING;

INTEGRATED CIRCUIT LAYOUT;

EID: 0029342313     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.391737     Document Type: Article

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