Design of a 100-MHz 10-mW 3-V Sample-and-Hold Amplifier in Digital Bipolar Technology

IEEE Journal of Solid-State Circuits

Volumn 30, Issue 7, 1995, Pages 724-730

  Razavi, Behzad ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BIPOLAR TRANSISTORS; BRIDGE CIRCUITS; CALCULATIONS; ELECTRIC LOSSES; ELECTRIC NETWORK TOPOLOGY; SEMICONDUCTOR DIODES; SEMICONDUCTOR JUNCTIONS;

DIFFERENTIAL VOLTAGE SWINGS; DIGITAL BIPOLAR TECHNOLOGY; HOLD MODE FEEDTHROUGH; QUASI DIFFERENTIAL TOPOLOGY; SAMPLE AND HOLD AMPLIFIER; SAMPLING RATE;

AMPLIFIERS (ELECTRONIC);

EID: 0029342048     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.391110     Document Type: Article

References (5)

1. B. Razavi, “A 100-MHz 10-mW all-NPN sample-and-hold circuit with 3-V supply,” in Proc. European Solid-State Circuits Conf., Sept. 1994, pp. 192–195.
2. P. Vorenkamp and J. P. M. Verdaasdonk, “Fully bipolar, 120-Msample/sec 10-b track-and-hold circuit,” IEEE J. Solid-State Circuits, vol. 27, pp. 987–992, July 1992.
3. B. Razavi, Principles of Data Conversion System Design. Piscataway, NJ: IEEE Press, 1995.
4. K. G. Moerschel et al., “BEST: A BiCMOS-compatible super-self-aligned ECL technology,” in Proc. CICC, May 1990, pp. 18. 3.1–18.3.4.
5. K. Poulton, J. S. Kang, and J. J. Corcoran, “A 2 Gs/s HBT sample and hold,” in Proc. IEEE GaAs IC Symp., 1988, pp. 199–202.