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Volumn 16, Issue 6, 1995, Pages 248-249

Nitridation of the Stacked Poly-Si Gate to Suppress the Boron Penetration in pMOS

Author keywords

[No Author keywords available]

Indexed keywords

BORON FLUORIDE; BORON PENETRATION; ELECTRICAL CHARACTERISTICS; LOW PRESSURE CHEMICAL VAPOR DEPOSITION; MOS CAPACITORS; NITRIDATION; NITROGEN RICH LAYERS; STACKED POLY SILICON GATE;

EID: 0029324282     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.790724     Document Type: Article
Times cited : (10)

References (9)
  • 1
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    • G. J. Hu and R. H. Bruce, “Design tradeoffs between surface and buried-channel FET's,” IEEE Trans. Electron Devices, vol. ED-32, p. 584, 1985.
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    • Hu, G.J.1    Bruce, R.H.2
  • 2
    • 0026897882 scopus 로고
    • The effect of silicon gate microstructure and gate oxide process on threshold voltage instabilities in p+ -gate p-channel MOSFET's with fluorine incorporation
    • H. H. Tseng, P. J. Tobin, F. K. Baker, J. R. Pfiester, K. Evans, and P. L. Fejes, “The effect of silicon gate microstructure and gate oxide process on threshold voltage instabilities in p + -gate p-channel MOSFET's with fluorine incorporation,” IEEE Trans. Electron Devices, vol. 39, p. 1687, 1992.
    • (1992) IEEE Trans. Electron Devices , vol.39 , pp. 1687
    • Tseng, H.H.1    Tobin, P.J.2    Baker, F.K.3    Pfiester, J.R.4    Evans, K.5    Fejes, P.L.6
  • 4
    • 0028422922 scopus 로고
    • Suppression of the boron penetration induced Si/SiO2 interface degradation by using a stacked-amorphous-silicon film as the gate structure for pMOSFET
    • S. L. Wu, C. L. Lee, and T. F. Lei, “Suppression of the boron penetration induced Si/SiO2 interface degradation by using a stacked-amorphous-silicon film as the gate structure for pMOSFET,” IEEE Trans. Electron Device Lett., vol. 5, p. 160, 1994.
    • (1994) IEEE Trans. Electron Device Lett. , vol.5 , pp. 160
    • Wu, S.L.1    Lee, C.L.2    Lei, T.F.3
  • 5
    • 84936896794 scopus 로고
    • Suppression of boron penetration in pMOS by using oxide gettering effect in poly-si gate
    • Japan, and Jpn J. Appl. Phys.
    • Y. H. Lin T. S. Chao, C. L. Lee, and T. F. Lei, “Suppression of boron penetration in pMOS by using oxide gettering effect in poly-si gate,” in Extended Abstracts of Conf. on SSDM Japan, 1994, p. 685, and Jpn, J. Appl. Phys., Vol. 34, part 1, no. 2B, Feb. 1995.
    • (1994) Extended Abstracts of Conf. on SSDM , vol.34 , Issue.1 , pp. 685
    • Lin, Y.H.1    Chao, T.S.2    Lee, C.L.3    Lei, T.F.4
  • 6
    • 0029306816 scopus 로고
    • Thin polyoxide on the top of poly-si gate to suppress boron penetration for pMOS
    • Y. H. Lin, C. L. Lee, T. F. Lei, and T. S. Chao, “Thin polyoxide on the top of poly-si gate to suppress boron penetration for pMOS,” IEEE Trans. Electron Device Lett., vol. 16, p. 164, May 1995.
    • (1995) IEEE Trans. Electron Device Lett. , vol.16 , pp. 164
    • Lin, Y.H.1    Lee, C.L.2    Lei, T.F.3    Chao, T.S.4
  • 7
    • 0027753412 scopus 로고
    • Boron diffusion through pure silicon oxide and oxynitride used for metal-oxide-silicon devices
    • T. Aoyama, K. Suzuki, H. Tashiro, Y. Toda, T. Yamazaki, Y. Arimoto, and T. Ito, “Boron diffusion through pure silicon oxide and oxynitride used for metal-oxide-silicon devices,” J. Electrochom. SOC., vol. 140, no. 12, p. 3624, 1993.
    • (1993) J. Electrochom. SOC. , vol.140 , Issue.12 , pp. 3624
    • Aoyama, T.1    Suzuki, K.2    Tashiro, H.3    Toda, Y.4    Yamazaki, T.5    Arimoto, Y.6    Ito, T.7


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.