An Unconditionally Stable Two-Stage CMOS Amplifier

IEEE Journal of Solid-State Circuits

Volumn 30, Issue 5, 1995, Pages 591-594

  Reay, Richard J ^a   Kovacs, Gregory T A ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC NETWORK TOPOLOGY; OPTIMIZATION; PHASE CONTROL; PHASE SHIFTERS; STABILITY;

AMPLIFIER PHASE MARGIN; CAPACITIVE LOAD; CMOS AMPLIFIER; LEVEL SHIFTING TECHNIQUE; MICROMETER TECHNOLOGY; OPTIMIZED CASCODED COMPENSATION TOPOLOGY; QUIESCENT CURRENT CONSUMPTION;

POWER AMPLIFIERS;

EID: 0029308949     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.384174     Document Type: Article

References (16)

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