Modeling the Polysilicon Depletion Effect and Its Impact on Submicrometer CMOS Circuit Performance

IEEE Transactions on Electron Devices

Volumn 42, Issue 5, 1995, Pages 935-943

  Arora, Narain D ^a   Rios, Rafael ^a   Huang, Cheng Liang ^a  

^a HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC CURRENTS; ELECTRIC INVERTERS; ELECTRIC NETWORK ANALYSIS; GATES (TRANSISTOR); MOSFET DEVICES; POLYCRYSTALLINE MATERIALS; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING;

POLYSILICON DEPLETION EFFECT; POLYSILICON GATE CONCENTRATION;

SEMICONDUCTOR DEVICE MODELS;

EID: 0029306016     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.381991     Document Type: Article

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