Technology Directions for Portable Computers

Proceedings of the IEEE

Volumn 83, Issue 4, 1995, Pages 636-658

  Harris, Erik P ^a   Depp, Steven W ^a   Pence, William E ^a   Kirkpatrick, Scott ^a   Sri Jayantha, M ^a   Troutman, Ronald R ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC BATTERIES; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRONIC EQUIPMENT MANUFACTURE; INFORMATION TECHNOLOGY; LIQUID CRYSTAL DISPLAYS; MICROPROCESSOR CHIPS; PERFORMANCE; POWER ELECTRONICS;

BATTERY LIFE; BATTERY POWERED PORTABLE COMPUTERS; PORTABILITY; POWER BUDGETS; SYSTEM POWER MANAGEMENT;

PERSONAL COMPUTERS;

EID: 0029288558     PISSN: 00189219     EISSN: 15582256     Source Type: Journal    
DOI: 10.1109/5.371971     Document Type: Article

References (37)

1. J. F. Freiman, “Portable computer power sources,” in Proc. 9th Annu. Battery Conf. on Appl. and Advances, IEEE/Cal. State, sponsored by IEEE and Dept. of Elec. Eng., Cal. State Univ.–Long Beach, Jan. 1994, Long Beach, CA, pp. 152-158.
2. E. Vittoz, “Micropower techniques,” in Design of MOS VLSI Circuits for Telecommunications, Y. Tsividis and P. Antognetti, Eds. Englewood Cliffs, NJ: Prentice-Hall, 1985.
3. S. Mahli and P. Chatterjee, “1-V microsystems–scaling on schedule for personal communications,” IEEE Circ. and Syst., pp. 13-17, Mar. 1994.
4. M. Culbert, “Low power hardware for a high performance PDA” in IEEE Spring COMPCON'94 Dig. of Papers. Los Alamitos, CA: IEEE Comp. Soc. Press, pp. 144-147, Mar.
5. R. Nagaraj, “Designing a 3 V notebook with the Intel 386 SL architecture,” Proc. 1992 Silicon Valley Personal Compu. Design Conf., vol. I, pp. 307-315, Santa Clara, CA, Aug. 1992.
6. L. R. Rabiner, “Applications of voice processing to telecommunications,” Proc. IEEE, vol. 82, pp. 199-228, 1994.
7. N. K. Yeung, Y.-H. Sutu, T. Y.-F. Su, E. T. Pak, C.-C. Chou, S. Akki, D. D. Yau, and R. Lodenquai, “The design of a 55SPECint92 RISC processor under 2W,” ISSCC Dig. Tech. Papers, pp. 206-207, Feb. 1994.
8. D. Pham, et al., “A 3.0 W 75SPECint92 85SPECfp92 superscalar RISC microprocessor,” ISSCC Dig. Tech. Papers, pp. 212-213, Feb. 1994.
9. J. Stockton, “Portable electronic storage systems,” IEEE Micro, pp. 69-76, Feb. 1994.
10. A. Stratakos, R. Broderson, and S. Sanders, “High-efficiency low-voltage dc-dc conversion for portable applications,” Proc. 1994 Int. Workshop on Low Power Design, sponsored by ACM-SIGDA and IEEE-CAS, Napa, CA, Apr. 1994, pp. 105-110.
11. R. Dobkin and S. Pietkiewicz, “Power supply considerations for PCMCIA compliant systems,” Proc. 1993 Silicon Valley Personal Compu. Design Conf., Santa Clara, CA, July 1993, pp. 351-364.
12. “Device cools Pentiums in notebooks,” PC Week, vol. 10, no. 4, p. 25, Dec. 13, 1993.
13. W. E. Howard, “Thin-film transistor/liquid crystal display technology–an introduction,” IBM J. Res. Dev., vol. 36, pp. 3-10, 1992.
14. P. Pleshko, “Overview and status of information displays,” Society for Information Display (SID) Seminar Lecture Notes, vol. 1. Seminar M-0, pp. 3-76, May 18, 1992.
15. “Sharp color TFT-LCD panel operates on 50 mW,” Electron., vol. 67, no. 8, p. 8, Apr. 1994.
16. B. Davari, and R. H. Dennard, “CMOS scaling, the next ten years,” Nikkei Microdevices, pp. 142-154, Sept. 1994, and IBM Research Report RC-19682.
17. B. Davari, R. H. Dennard, and G. Shahidi, “CMOS scaling for high performance and low power–the next ten years” Proc. IEEE, this issue.
18. K. Itoh, K. Sasaki, and Y. Nakagome, “Trends in low-power RAM circuit technologies,” Proc. 1994 IEEE Symp. on Low Power Electron., Oct. 10-12, 1994, San Diego, CA, pp. 84-87.
19. J. M. Rabaey, “Low power digital design,” 1994 IEEE Int. Symp. on Circ. and Syst., London, UK, May/June 1994, Circuits and Systems Tutorial Vol., Tutorial 8, pp. 373-386.
20. N. Weste and K. Eshragian, Principles of CMOS VLSI Design—A Systems Perspective. Reading, MA: Addison-Wesley, 1985, ch. 4.
21. R. H. Dennard, F. H. Gaensslen, H. N. Yu, V. L. Rideout, E. Bassous, and A. R. LeBlanc, “Design of ion-implanted MOSFETs with very small physical dimensions,” IEEE J. Solid State Circ., vol. SC-9, pp. 256-268, 1974.
22. D. Liu and C. Svensson, “Trading speed for low power by choice of supply and threshold voltages,” IEEE J. Solid State Circ., vol. SC-28, pp. 10-17, 1993.
23. L. Geppert, “Not your father's CPU,” IEEE Spectrum, pp. 20-25, Dec. 1993.
24. A. Chandrakasan, S. Sheng, and R. W. Broderson, “Low-power CMOS digital design,” IEEE J. Solid State Circ., vol. SC-27, pp. 473-484, 1992.
25. “New LAN gear snaps unseen desktop chains,” Data Commun., pp. 75-80, Mar. 21, 1994.
26. D. J. Goodman, “Trends in cellular and cordless communications,” IEEE Commun. Magazine, vol. 29, pp. 31–40, June 1991.
27. “Test 21: Schnurlos telefone. meter freiheit,” Funkschau, pp. 10-17, Feb. 4, 1994.
28. “EDN's DSP chip directory,” EDN, Sept. 1993.
29. J. M. Harker, D. W. Brede, R. E. Pattison, G. R. Santana, and L. G. Taft, “A quarter century of disk file innovation,” IBM J. Res. Dev., vol. 25, pp. 677-689, 1981.
30. 1993 Disk/Trend Rep.-Rigid Disk Drives, Oct. 1993.
31. T. Parrish and G. Kelsic, “Dynamic head loading technology Increases drive ruggedness,” Computer Tech. Rev., pp. 51-55, Winter 1992.
32. M. Sri-Jayantha, H. Tokumitsu, and A. Aoyagi, “HDA configuration for minimum idle mode power by optimum read/write head positioning,” IBM Tech. Disclosure Bull., vol. 36, no. 06A, pp. 181-184, June 1993.
33. K. Sun, “Laptop hard disk drive specs require design optimization today,” Computer Tech. Rev., pp. 49-54, Spring 1990.
34. F. Goodenough, “Lone 3-V rail powers IC disk-drive read channel,” Electron. Design, pp. 43-48, June 25, 1992.
35. D. H. Straayer, “Pointing solutions for notebook computers: The isometric alternatives,” Proc. 1993 Silicon Valley Pers. Compu. Design Conf., Santa Clara, CA, July 1993, pp. 553-558.
36. S. C. Ellis, “Power management in notebook computers,” Proc. 1991 Silicon Valley Pers. Compu. Design Conf., Santa Clara, CA, July 1991, pp. 749-754.
37. S. Datta, “Advanced power management (APM) BIOS implementation on the Intel 386TM SL microprocessors,” Proc. 1992 Silicon Valley Pers. Compu. Design Conf., vol. 2, Santa Clara, CA, Aug. 1992, pp. 319-324.