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Volumn 31, Issue 2, 1995, Pages 1208-1214
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Design and Performance of a VLSI 120 Mb/s Trellis-Coded Partial Response Channel
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Author keywords
[No Author keywords available]
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Indexed keywords
CMOS INTEGRATED CIRCUITS;
DECODING;
ENCODING (SYMBOLS);
INTEGRATED CIRCUIT LAYOUT;
TIME VARYING NETWORKS;
VLSI CIRCUITS;
ADD COMPARE SELECT (ACS) TOPOLOGY;
MATCHED SPECTRAL NULL (MSN) CODE;
REGISTER EXCHANGE METHODS;
TRACEBACK METHODS;
TRELLIS CODED PARTIAL RESPONSE (TCPR) CODED MODULE;
TRELLIS CODES;
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EID: 0029276712
PISSN: 00189464
EISSN: 19410069
Source Type: Journal
DOI: 10.1109/20.364808 Document Type: Article |
Times cited : (9)
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References (8)
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