Si/SiGe Epitaxial-Base Transistors—Part II: Process Integration and Analog Applications

IEEE Transactions on Electron Devices

Volumn 42, Issue 3, 1995, Pages 469-482

  Harame, D L ^a,b   Comfort, J H ^a,b   Crabbe E F ^a,b   Sun, J Y C ^a,b   Meyerson, B S ^a,b   Cressler, J D ^c   Tice, T ^a,b  

^a IBM RESEARCH   (United States)

^b Materials Science and Technology Conferences   (United States)

^c AUBURN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EPITAXIAL GROWTH; FILM PREPARATION; HETEROJUNCTION BIPOLAR TRANSISTORS; OPTIMIZATION; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE STRUCTURES;

EPITAXIAL BASE TRANSISTORS; PROCESS INTEGRATION;

BIPOLAR TRANSISTORS;

EID: 0029274349     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.368043     Document Type: Article

References (60)

1. D. L. Harame, J. H. Comfort, J. D. Cressler, E. F. Crabbé, J. Y.-C. Sun, B. S. Meyerson, and T. Tice, “Si/SiGe epitaxial-base transistors: Part I-Materials, physics and circuits,” IEEE Trans. Electron Devices, pp. 455-468, Mar. 1995.
2. W. R. Burger, J. H. Comfort, L. M. Garverick and R. Reif, “Bipolar transistor fabrication in low-temperature (745°C) ultra-low-pressure chemical-vapor-deposited epitaxial silicon,” Electron Device Lett., vol. 8, pp. 168–171, Apr. 1987.
3. T. Nguyen, D. L. Harame, J. M. C. Stork, F. K. LeGoues and B. S. Meyerson, “Diodes fabricated from UHV/CVD,” in IECM Tech. Dig., p. 304, LosAngeles, CA.: IEEE, 1986.
4. S. S. Iyer, G. L. Patton, S. L. Delage, S. Tiwari and J. M. C. Stork, “Silicon-germanium base heterojunction bipolar transistors by molecular beam epitaxy,” in IEDM Tech., Dig., pp. 874–876, Dec. 1987.
5. C. A. King, J. L. Hoyt, C. M. Gronet, J. F. Gibbons, M. P. Scott and J. Turner; “ Si/Si1 -x/Gex heterojunction bipolar transistors produced by limited reaction processing,” IEEE Electron Device Lett., vol. 10, no. 2, pp. 52–54, Feb. 1989.
6. G. L. Patton, D. L. Harame, J. M. C. Stork, B. S. Meyerson, G. J. Scilla and E. Ganin “Graded-SiGe-base, poly-emitter heterojunction bipolar transistors,” IEEE Electron Device Lett., vol. 10, no. 12, pp. 534–536, Dec. 1989.
7. G. L. Patton, J. H. Comfort, B. S. Meyerson, E. F. Crabbé, E. de Frésart, J. M. C. Stork, J. Y.-C. Sun, D. L. Harame and J. Burghartz, “63-75 GHz fT SiGe-base heterojunction-bipolar technology,” VLSI Tech. Digest, pp. 49–50, June 1990.
8. R. Schulz, M. Jost, D. L. Harame, G. J. Scilla, B. S. Meyerson and G. B. Bronner, “A fully self-aligned epitaxial-base transistor,” in VLSI Tech. Dig., pp. 89–90, June 1989.
9. J. N. Burghartz, B. J. Ginsberg and S. R. Mader, “New technology for bipolar emitters in the deep sub-micron range,” in Symp. VLSI Technol. Dig. Tech. Papers, pp. 57–58, May 1989.
10. D. L. Harame, K. Schonenberg, M. Gilbert, D. Nguyen-Ngoc, J. Malinowski, S.-J. Jeng, B. S. Meyerson, J. D. Cressler, R. Groves, G. Berg, K. Tallman, K. Stein, G. Hueckel, C. Kermarrec, T. Tice, G. Fitzgibbons, K. Walter, D. Colavito, T. Houghton, N. Greco, T. Kebede, B. Cunningham, S. Subbanna, J. H. Comfort and E. F. Crabbé, “A 200 mm SiGe-HBT technology for wireless and mixed signal applications,” in IEDM Tech. Dig., pp. 437–440, Dec. 1994.
11. D. V. Lang, R. People, J. C. Bean and A. M. Sergent, “Measurement of the bandgap of SiGe/Si strained heterostructures,” Appl. Phys. Lett., vol. 47, pp. 1333–1335, Dec. 1985.
12. J. Murota, N. Nakamura, M. Kato and N. Mikoshiba, “Low-temperature silicon selective deposition and epitaxy on silicon using the thermal decomposition of silane under ultraclean environment,” Appl. Phys. Lett., vol. 54, p. 1007, 1989.
13. M. Copel, M. C. Reuter, E. Kaxiras and R. M. Trom p, “Surfactants in epitaxial growth,” Phys. Rev. Lett., vol. 63, pp. 632-635, 1989.
14. T. O. Sedgwick, P. D. Agnello, D. Nguyen-Ngoc, T. S. Kuan and G. Scilla, “High phosphorous doping of epitaxial silicon at low temperature and atmospheric pressure,” Appl. Phys. Lett., vol. 58, pp. 1896–1898, 1991.
15. T. O. Sedgwick, V. P. Kesan, P. D. Agnello, D. A. Grützmacher D. Nguyen-Ngoc and S. S. Iyer, “Characterization of devices fabricated in films at low temperature by atmospheric pressure CVD,” in IEDM Tech., Dig., pp. 451–455, 1991.
16. J. W. Matthews and A. E. Blakeslee, “Defects in epitaxial multilayers I. Misfit dislocations in layers,” J. Crystal Growth, vol. 27, pp. 118–125, 1974.
17. J. W. Matthews and A. E. Blakeslee, “Defects in epitaxial multilayers II. Dislocation pile-ups, threading dislocations, slip lines and cracks,” J. Crystal Growth, vol. 32, pp. 265–273, 1975.
18. D. L. Harame, J. M. C. Stork, B. S. Meyerson, K. Y.-J. Hsu, J. Cotte, K. A. Jenkins, J. D. Cressler, P. Restle, E. F. Crabbé, S. Subbanna, T. Tice, B. W. Scharf and J. A. Yasaitis, “Optimization of SiGe HBT technology for high speed analog and mixed-signal applications,” in IEDM Tech., Dig., pp. 874–876. Dec. 1993.
19. F. K. Legoues, S. S. Iyer, K. N. Tu and S.L. Delage, “Thermal relaxation of SiGe layers misfit dislocation generation versus diffusion,” in Mat. Res. Soc. Symp. Proc., vol. 103, pp. 185–190, 1987.
20. F. K. Legoues, R. Rosenberg, T. Nguyen and B. S. Meyerson, “The mechanism of oxidization of SiGe,” in Mat. Res. Soc. Symp. Proc., vol. 105, pp. 313–318, 1988.
21. G. L. Patton, S. S. Iyer, S. L. Delage, E. Ganin and R. C. Mcintosh, “Oxidation of strained Si-Ge layers grown by MBE,” in Mat. Res. Soc. Symp. Proc., vol. 102, pp. 295–299, 1988.
22. S. S. Iyer, G. L. Patton, S. L. Delage, S. Tiwari and J. M. C. Stork, “Silicon-germanium base heterojunction bipolar transistors by molecular beam epitaxy,” in IEDM Tech. Dig., pp. 874–876, Dec. 1987.
23. A. Gruhle, H. Kibbel, U. König, U. Erben and E. Kasper, “MBE-grown Si/SiGe HBT's with high fT and fMAX,” IEEE Electron Device Lett., vol. 13, no. 4, pp. 206–208, Apr. 1992.
24. A. Gruhle, “High-Performance Si/SiGe heterojunction bipolar transistors grown by molecular-beam epitaxy,” J. Vac. Sci. Technol. B, vol. 11, no. 3, pp. 1186–1189, 1993.
25. A. Schuppen, A. Gruhle, U. Erben, H. Kibbel, and U. Konig, “Multi emitter Figner SiGe HBTs with f sub max up to 120 GHz,” in IEDM Tech. Dig., pp. 377–380, Dec. 1994.
26. J. H. Comfort, E. F. Crabbé, J. D. Cressler, W. Lee, J. Y.-C. Sun, J. Malinowski, M. D’Agostino, J. N. Burghartz, J. M. C. Stork and B. S. Meyerson, “Single crystal emitter cap for epitaxial Si- and SiGe-base transistors,” in IEDM Tech. Dig., pp. 857–860, 1991.
27. P. Kuo, J. L. Hoyt, J. F. Gibbons, J. E. Turner, R. D. Jacowitz and T. I. Kamins, “Comparison of boron diffusion in Si and strained SiGe epitaxial layers,” Appl. Phys. Lett., vol. 62, no. 6, pp. 612-614, 1993.
28. T. Sugii, T. Yamazaki, T. Fukano, and T. Ito,Epitaxial grown base transistor for high-speed technology,” Electron Device Lett., vol. EDL-8, no. 11, Nov. 1987.
29. K. Suzuki, T. Fukano, T. Yamazaki, S. Hijiya, T. Ito and H. Ishikawa, “Pseudo-HBT with polysilicon emitter contact and an ultrashallow highly doped base by photoepitaxy,” in IEDM Tech. Dig., pp. 811–814, 1989.
30. M. Hong, E. de Fräsart, J. Steele, A. Zlotnicka, C. Stein, G. Tam, M. Racanelli, L. Knoch, Y. C. See and K. Evans, “High-Performance epitaxial base bipolar transistors produced by a reduced-pressure CVD reactor,” IEEE Electron Device Lett., vol. 14, no. 9, pp. 450–452, Sept. 1993.
31. E. F. Crabbé J. H. Comfort, J. D. Cressler, J. Y.-C. Sun and J. M. C. Stork “High-low polysilicon-emitter SiGe-base bipolar transistors,” IEEE Electron Device Lett., vol. 14, no. 10, pp. 478–480, 1993.
32. G. L. Patton, D. L. Harame, J. M. C. Stork, H. S. Meyerson, G. J. Scilla, and E. Ganin, “Si-Ge base, poly-emitter heterojunction bipolar transistors,” in 1989 Symp. on VLSI Tech. Dig., pp. 95–96, May 1989.
33. E. Crabbé B. S. Meyerson, D. L. Harame, J. Stork, A. Megdanis, J. Cotte, J. Chu, M. Gilbert, M. Gilbert, C. Stanis, J. Comfort, G. Patton änd S. Subbanna, “113 GHz fT graded-base SiGe HBT's,” in Proceed. 1993, Dev. Res. Conf., Santa Barbara, CA: TMS, 1993.
34. E. Crabbé B. S. Meyerson, J. M. C. Stork, J. Y.-C. Sun, G. Scilla, J. Warnock, K. Jenkins, K.-Y. Toh, D. L. Harame and S. R. Mader, “Sub-3Ops ECL circuits using high-fT Si and SiGe epitaxial base SEEW transistors,” in IEDM Tech. Dig. pp. 83–86. Dec. 1993.
35. J. N. Burghartz, J. H. Comfort, G. L. Patton, J. D. Cressler, B. S. Meyerson, J. M. C. Stork, J. Y.-C. Sun, G. Scilla, J. Warnock, K. Jenkins, K.-Y. Toh, D. L. Harame and S. R. Mader, “Sub-30ps ECL
36. circuits using high-fT Si and SiGe epitaxial base SEEW transistors,” in IEDM Tech. Dig., pp. 297–300, 1990.
37. J. M. C. Stork, “Bipolar transistor scaling for minimum switching delay and energy dissipation,” in IEDM Tech. Dig., pp. 550–553, 1988.
38. G. P. Li, T. C. Chen, C. T. Chuang, and T. H. Ning, “Bipolar transistor with self-aligned lateral profile,” IEEE Electron Device Lett., vol. 8, no. 4, pp. 338–340, Apr. 1987.
39. J. H. Comfort, G. L. Patton, J. D. Cressler, W. Lee, E. F. Crabbé, B. S. Meyerson, J. Y.-C. Sun, J. M., C. Stork, P.-F. Lu, J. N. Burghartz, J. Warnock, G. Scilla, K.-Y. Toh, M. D'Agostino C. Stanis and K. Jenkins, “Profile leverage in a self-aligned epitaxial Si or SiGe bipolar technology,” in IEDM Tech. Digest, pp. 21–24, Dec. 1990.
40. J. N. Burghartz, J. Y.-C. Sun, S. R. Mader, B. Ginsberg, C. L. Stanis and B. J. Ginsberg, “Perimeter and plug effects in deep sub-micron polysilicon emitter bipolar transistors,” in VLSI Tech. Dig., June 1990.
41. K. Yano, K. Nakazato, M. Miyamoto, M. Aoki and K. Shimohigashi, “A high-current-gain low-temperature pseudo-HBT utilizing a sidewall base contact structure (SICOS),“ IEEE Electron Device Lett., vol. 10, no. 10, pp. 452–454, Oct. 1989.
42. D. D. Tang and P. F. Lu, “A Reduced-field design concept for high performance bipolar transistors,” IEEE Electron Device Lett., vol. 10, no. 2, pp. 67–69, 1989.
43. K. Yano, K. Nakazato, M. Miyamoto, M. Aoki and K. Shimohigashi, “A high-current-gain low-temperature pseudo-HBT utilizing upward operation of sidewall base-contact structure (SICOS),“ in VLSI Tech. Dig., pp. 93–94, 1989.
44. J. N. Burghartz, B. J. Ginsberg, S. R. Mader, T. C. Chen and D. L. Harame, “Selective epitaxy base transistor (SEBT),“ IEEE Electron Device Lett., vol. 9, no. 5, pp. 259–261, May 1988.
45. T. F. Meister, R. Stengl, H. W. Meul, R. Weyl, P. Packan, A. Felder, H. Klose, R. Schreiter, J. Popp, H. M. Rein and L. Treitinger, “Sub-20ps silicon bipolar technology using selective epitaxial growth,” i n IEDM Tech. Dig., pp. 401-404 1992.
46. F. Sato, H. Takemura, T. Tashiro, H. Hirayama, M. Hiroi, K. Koyama and M. Nakamae, “A self-aligned selective MBE technology for high performance bipolar transistors,” in IEDM Tech. Dig., pp. 607–610, 1990.
47. F. Sato, T. Hashimoto, T. Tatsumi, H. Kitahata and T. Tashiro, “Sub-20 psec ECL circuits with 50 GHz fmax self-aligned SiGe HBT's,” in IEDM Tech. Dig., pp. 397–400, 1992.
48. T. Hashimoto, H. Tezuka, F. Sato, M. Soda, T. Suzaki, T. Tatsumi and T. Tashiro, “SiGe bipolar IC's for 20 Gb/s optical transmitter,” i nProc. Bipolar/BiCMOS Circuits and Technology Meeting, pp. 167–170, 1990.
49. E. Ganin, T. C. Chen, J. M. C. Stork, B. S. Meyerson, J. D. Cressler, G. Scilla, J. Warnock, D. L. Harame, G. L. Patton and T. H. Ning, “Epitaxial-base double-poly self-aligned bipolar transistors,” in IEDM Tech. Dig., pp. 603–606, Dec. 1990.
50. J. N. Burghartz, J. H. Comfort, G. L. Patton, B. S. Meyerson, J. Y.-C. Sun, J. M. C. Stork, S. R. Mader, C. L. Stanis, G. J. Scilla and B. J. Ginsberg, “Self-aligned SiGe-base heterojunction bipolar transistor by selective epitaxy emitter window (SEEW) technology,” IEEE Electron Device Lett., vol. 11, no. 7, pp. 288–290, July 1990.
51. D. L. Hararne, J. M. C. Stork, B. S. Meyerson, T. N. Nguyen and G. J. Scilla, “Epitaxial-base transistors with ultra-high vacuum chemical vapor deposition (UHV/CVD) epitaxy/enhanced profile control for greater flexibility in device design,” IEEE Electron Device Lett., vol. 10, no. 4, pp. 156–158, Apr. 1989.
52. D. L. Harame, E. Ganin, J. H. Comfort, J. Y.-C. Sun, A. Acovic, J. H. Comfort, J. Y.-C. Sun, A. Acovic, S. A. Cohen, P. A. Ronsheim, S. Vandebroek, P. J. Restle, S. Ratanaphanyarat, M. J. Saccamango, J. B. Johnson and S. A. Furkay, “Low thermal budget antimony/phosphorous NMOS technology for CMOS,” in IEDM Tech. Dig., Dec. 1991.
53. J. H. Comfort, P.-F. Lu, D. D. Tang, T.-C. Chen, J. Y.-C Sun, B. S. Meyerson, W. Lee, J. Warnock, J. D. Cressler, K.-Y. Toh, and J. M. Cotte, “A 26 ps self-aligned epitaxial silicon base bipolar technology,” in VLSI Tech. Digest, pp. 51–52, June 1990.
54. D. L. Hararne, E. F. Crabbé, J. D. Cressler, J. H. Comfort, J. Y.-C. Sun, S. R. Stiffler, E. Kobeda, J. N. Burghartz, M. M. Gilbert, J. C. Malinowski and A. J. Dally, “A high performance epitaxial SiGe-Base ECL BiCMOS technology,” in IEDM Tech. Dig., pp. 19–22, Dec. 1992.
55. D. L. Harame, J. H. Comfort, J. D. Cressler, E. F. Crabbé, B. S. Meyerson, J. Y. C. Sun and T. Tice, “Si/SiGe epitaxial-base technology: part i. materials, physics and circuits,” Trans. Electron Devices, pp. 1–22, Feb. 1995.
56. E. F. Crabbé, J. H. Comfort, W. Lee, J. D. Cressler, B. S. Meyerson, J. Y.-C. Sun and J. M. C. Stork, “73-Ghz self-aligned sige-base bipolar transistors with phosphorous doped polysilicon emitters,” IEEE Electron Device Lett., vol. 13, no. 5, pp. 259–261, May 1992.
57. B. Davari, W. H. Chang, M. R. Wordeman, C. S. Oh, Y. Taur, K. E. Petrillo, D. Moy, J. J. Bucchignano, H. Y. Ng, M. G. Rosenfield, F. J. Hohn and M. D. Rodrigulez, “A high performance 0.25 µm CMOS technology,” in IEDM Tech. Dig., pp. 56–59, 1988.
58. AD9712 Sheet Data, Wilmington, MA, 1994.
59. AD9712 Sheet Data, Wilmington, MA, 1994.
60. AD9720 Data Sheet, Wilmington, MA, 1994.