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Volumn 42, Issue 3, 1995, Pages 506-512

TFSOI Complementary BiCMOS Technology for Low Power Applications

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR SEMICONDUCTOR DEVICES; CMOS INTEGRATED CIRCUITS; EMITTER COUPLED LOGIC CIRCUITS; GATES (TRANSISTOR); PRODUCT DESIGN; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SILICON ON INSULATOR TECHNOLOGY; THIN FILM DEVICES;

EID: 0029273777     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.368047     Document Type: Article
Times cited : (19)

References (16)
  • 2
    • 85051940193 scopus 로고
    • Future technological and economic prospects for VLSI
    • H. Komiya, “Future technological and economic prospects for VLSI,” ISSCC Digest of Tech. Papers, pp. 16-19, 1993.
    • (1993) ISSCC Digest of Tech. Papers , pp. 16-19
    • Komiya, H.1
  • 3
    • 85051959597 scopus 로고
    • A high speed SOI technology with 12 ps/18 ps gate delayoperating at 5 V/1.5 V
    • J. Chen, S. Parke, J. King, F. Assaderaghi, P. K. Ko, and C. Hu, “A high speed SOI technology with 12 ps/18 ps gate delay operating at 5 V/1.5 V,” IEDM Tech. Dig., pp. 35–38, 1992.
    • (1992) IEDM Tech. Dig. , pp. 35-38
    • Chen, J.1    Parke, S.2    King, J.3    Assaderaghi, F.4    Ko, P.K.5    Hu, C.6
  • 9
    • 84908167248 scopus 로고
    • A versatile, SOI BiCMOS technology with complementary lateral BIT's
    • S. Parke, F. Assaderaghi, J. Chen, J. King, C. Hu, and P. K. Ko, “A versatile, SOI BiCMOS technology with complementary lateral BIT's,” IEDM Tech. Dig., pp. 453–456, 1992.
    • (1992) IEDM Tech. Dig. , pp. 453-456
    • Parke, S.1    Assaderaghi, F.2    Chen, J.3    King, J.4    Hu, C.5    Ko, P.K.6
  • 14
    • 0026204649 scopus 로고
    • A CV technique for measuring thin SOI film thickness
    • J. Chen, R. Solomon, T.-Y. Chan, P.-K. Ko, and C. Hu, “A CV technique for measuring thin SOI film thickness,” IEEE Electron Device Lett., vol. 12, no. 8, pp. 453–455, 1991.
    • (1991) IEEE Electron Device Lett. , vol.12 , Issue.8 , pp. 453-455
    • Chen, J.1    Solomon, R.2    Chan, T.-Y.3    Ko, P.-K.4    Hu, C.5
  • 16
    • 0027576930 scopus 로고
    • A I-GHz/0.9 mW CMOS/SLMOX divide-by-128/129 dual-modulus prescaler using a divide-by-2/3 synchronous counter
    • Y. Kado, M. Suzuki, K. Koike, Y. Omura, and K. Izumi, “A I-GHz/0.9 mW CMOS/SLMOX divide-by-128/129 dual-modulus prescaler using a divide-by-2/3 synchronous counter,” IEEE J. Solid-State Circuits, vol. 28, no. 4, pp. 5l3-517, 1993.
    • (1993) IEEE J. Solid-State Circuits , vol.28 , Issue.4 , pp. 513-517
    • Kado, Y.1    Suzuki, M.2    Koike, K.3    Omura, Y.4    Izumi, K.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.