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Volumn 43, Issue 3, 1995, Pages 493-498

Analytical Parameter Extraction of the HBT Equivalent Circuit with T-Like Topology from Measured S-Parameters

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; CAPACITANCE; ELECTRIC IMPEDANCE; ELECTRIC NETWORK TOPOLOGY; ELECTRIC RESISTANCE; ELECTRIC VARIABLES MEASUREMENT; EQUIVALENT CIRCUITS; FIELD EFFECT TRANSISTORS; FREQUENCIES; OPTIMIZATION; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0029272049     PISSN: 00189480     EISSN: 15579670     Source Type: Journal    
DOI: 10.1109/22.372091     Document Type: Article
Times cited : (48)

References (15)
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  • 8
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    • A three-step method for the de-embedding of high-frequency S-parameter measurements
    • June
    • H. Cho and D. Burk, “A three-step method for the de-embedding of high-frequency S-parameter measurements,” IEEE Trans. Electron Dev., vol. 38, pp. 1371–1375, June 1991.
    • (1991) IEEE Trans. Electron Dev. , vol.38 , pp. 1371-1375
    • Cho, H.1    Burk, D.2
  • 9
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    • July
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  • 10
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    • July
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    • Berroth, M.1    Bosch, R.2
  • 11
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    • Mar.
    • S. Lee and A. Gopinath, “Parameter extraction technique for HBT equivalent circuit using cutoff mode measurement,” IEEE Trans. Microwave Theory Tech., vol. 40, pp. 574–577, Mar. 1992.
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  • 12
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    • A parameter extraction technique for heterojunction bipolar transistors
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  • 13
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.