Clockfeedthrough Compensation Technique for Switched-Current Circuits

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 42, Issue 3, 1995, Pages 229-231

  Helfenstein, Markus ^a   Moschytz, George S ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK FREQUENCY; CLOCKFEEDTHROUGH COMPENSATION TECHNIQUE; ERROR CURRENTS; GATE DIFFUSION OVERLAP CAPACITANCES; MEMORY CAPACITOR; SAMPLE AND HOLD CIRCUITS; SWITCHED CURRENT CIRCUITS; THRESHOLD VOLTAGE;

ALGORITHMS; CALCULATIONS; CAPACITORS; ELECTRIC CURRENTS; ELECTRIC LOSSES; ERRORS; FREQUENCIES; MATHEMATICAL MODELS; PROBLEM SOLVING; SIGNAL PROCESSING; TIMING CIRCUITS; TRANSISTORS;

SWITCHING CIRCUITS;

EID: 0029269839     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.372874     Document Type: Article

References (7)

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7. M. J. Pelgrom, A. C. Duinmaijer, and A. P. Welbers, “Matching properties of MOS transistors,” IEEE J. Solid-State Circuits, vol. 24, no. 5, pp. 1433-1440, Oct. 1989.