-
1
-
-
33845577275
-
A digital frequency synthesizer
-
C. Tierney, M. Rader, and B. Gold, “A digital frequency synthesizer,” IEEE Trans. Audio Electroacoust., vol. AU-19, pp. 48–57, 1971.
-
(1971)
IEEE Trans. Audio Electroacoust.
, vol.AU-19
, pp. 48-57
-
-
Tierney, C.1
Rader, M.2
Gold, B.3
-
2
-
-
0026382481
-
A 150 MHz direct digital frequency synthesizer in 1.25-µm CMOS with –90 dBc spurious performance
-
Dec.
-
H. T. Nicholas, III and H. Samueli, “A 150 MHz direct digital frequency synthesizer in 1.25-µm CMOS with –90 dBc spurious performance,” IEEE J. Solid-State Circuits, vol. 26, pp. 1959–1969, Dec. 1991.
-
(1991)
IEEE J. Solid-State Circuits
, vol.26
, pp. 1959-1969
-
-
Nicholas, H.T.1
Samueli, H.2
-
3
-
-
0026748134
-
Low latency, high-speed numerically controlled oscillator using progression-of-states technique
-
Jan.
-
M. Thompson, “Low latency, high-speed numerically controlled oscillator using progression-of-states technique,” IEEE J. Solid-State Circuits, vol. 27, pp. 113–117, Jan. 1992.
-
(1992)
IEEE J. Solid-State Circuits
, vol.27
, pp. 113-117
-
-
Thompson, M.1
-
5
-
-
0024027811
-
The optimization of direct digital frequency synthesizer performance in the presence of finite word length effects
-
May
-
H. T. Nicholas, III, H. Samueli, and B. Kim, “The optimization of direct digital frequency synthesizer performance in the presence of finite word length effects,” in Proc. 42nd Annu. Frequency Com. Symp. USER-ACOM, May 1988, pp. 357–363.
-
(1988)
Proc. 42nd Annu. Frequency Com. Symp. USER-ACOM
, pp. 357-363
-
-
Nicholas, H.T.1
Samueli, H.2
Kim, B.3
-
6
-
-
0001146101
-
A signed binary multiplication technique
-
Aug.
-
A. D. Booth, “A signed binary multiplication technique,” Quart. J. Mech. Appl. Math., vol. IV, pt. 2, pp. 236–240, Aug. 1950.
-
(1950)
Quart. J. Mech. Appl. Math.
, vol.4
, pp. 236-240
-
-
Booth, A.D.1
-
7
-
-
84913396280
-
Conditional sum additional logic
-
June
-
J. Sklansky, “Conditional sum additional logic,” IRE Trans. Electron. Comput., vol. EC-9, no. 2, pp. 226–231, June 1960.
-
(1960)
IRE Trans. Electron. Comput.
, vol.EC-9
, Issue.2
, pp. 226-231
-
-
Sklansky, J.1
-
8
-
-
0024611252
-
High speed CMOS circuit technique
-
Feb.
-
J. Yuan and C. Svensson, “High speed CMOS circuit technique,” IEEE J. Solid-State Circuits, vol. 24, pp. 62–69, Feb. 1989.
-
(1989)
IEEE J. Solid-State Circuits
, vol.24
, pp. 62-69
-
-
Yuan, J.1
Svensson, C.2
-
9
-
-
0026369316
-
A 200 MHz all-digital QAM modulator and demodulator in 1.2µm CMOS for digital radio applications
-
Dec.
-
B. C. Wong and H. Samueli, “A 200 MHz all-digital QAM modulator and demodulator in 1.2µm CMOS for digital radio applications,” IEEE J. Solid-State Circuits, vol. 26, pp. 1970–1979, Dec. 1991.
-
(1991)
IEEE J. Solid-State Circuits
, vol.26
, pp. 1970-1979
-
-
Wong, B.C.1
Samueli, H.2
-
10
-
-
0023586546
-
An analysis of the output spectrum of direct digital frquency synthesizers in the presence of phase-accumulator truncation
-
May
-
H. T. Nicholas, III, and H. Samueli, “An analysis of the output spectrum of direct digital frquency synthesizers in the presence of phase-accumulator truncation,” in Proc. 41st Annu. Frequency Cont. Symp. USERACOM, May 1987, pp. 495-502.
-
(1987)
Proc. 41st Annu. Frequency Cont. Symp. USERACOM
, pp. 495-502
-
-
Nicholas, H.T.1
Samueli, H.2
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